Search results

DAG: Emit an error if trying to legalize read/write register with illegal types

backend:AArch64

backend:AMDGPU

backend:ARM

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SystemZ

backend:X86

llvm:codegen

llvm:globalisel

llvm:ir

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 145197

#145197 In llvm/llvm-project;

· arsenm opened on Jun 22, 2025

[AMDGPU] Add s_setprio_inc_wg gfx1250 instruction

backend:AMDGPU

clangClang issues not falling into any other categoryClang issues not falling into any other category

clang:frontendLanguage frontend issues, e.g. anything involving "Sema"Language frontend issues, e.g. anything involving "Sema"

llvm:ir

mcMachine (object) codeMachine (object) code

Status: Open (in progress).

llvm/llvm-projectnumber 145152

#145152 In llvm/llvm-project;

· rampitec opened on Jun 21, 2025

[LangRef] Require that vscale be a power of two

backend:AArch64

backend:RISC-V

llvm:analysis

llvm:instcombine

llvm:ir

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

llvm:transforms

vectorizers

Status: Open (in progress).

llvm/llvm-projectnumber 145098

#145098 In llvm/llvm-project;

· preames opened on Jun 20, 2025

[OptBisect][IR] Adding a new OptPassGate for disabling passes via name

clangClang issues not falling into any other categoryClang issues not falling into any other category

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 145059

#145059 In llvm/llvm-project;

· cristianassaiante opened on Jun 20, 2025

Where and When does the outer customized pass plugin execute exactly?

llvm:ir

questionA question, not bug report. Check out https://llvm.org/docs/GettingInvolved.html instead!A question, not bug report. Check out https://llvm.org/docs/GettingInvolved.html instead!

Status: Open.

#144992 In llvm/llvm-project;

· TJU-PanYizhe opened on Jun 20, 2025

TableGen: Handle setting runtime libcall calling conventions

llvm:codegen

llvm:ir

tablegen

Status: Open (in progress).

llvm/llvm-projectnumber 144980

#144980 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

RuntimeLibcalls: Associate calling convention with libcall impls

backend:ARM

backend:Lanai

backend:MSP430

llvm:codegen

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 144979

#144979 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

TableGen: Allow defining sets of runtime libraries

llvm:codegen

llvm:ir

tablegen

Status: Open (in progress).

llvm/llvm-projectnumber 144978

#144978 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

AArch64: Add libcall impl declarations for __arm_sc* memory functions

backend:AArch64

llvm:codegen

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 144977

#144977 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

XCore: Declare libcalls used for align 4 memcpy

llvm:codegen

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 144976

#144976 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

Hexagon: Add libcall declarations for special memcpy

backend:Hexagon

llvm:codegen

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 144975

#144975 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025

ARM: Add runtime libcall definitions for aebi memory functions

backend:ARM

llvm:codegen

llvm:ir

Status: Open (in progress).

llvm/llvm-projectnumber 144974

#144974 In llvm/llvm-project;

· arsenm opened on Jun 20, 2025