diff --git a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
index f32c1e964f973..40f148438e537 100644
--- a/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
+++ b/llvm/test/CodeGen/AArch64/misched-branch-targets.mir
@@ -1,6 +1,9 @@
 # RUN: llc -o - -run-pass=machine-scheduler -misched=shuffle %s | FileCheck %s
 # RUN: llc -o - -run-pass=postmisched %s | FileCheck %s
 
+# REQUIRES: asserts
+# -misched=shuffle is only available with assertions enabled
+
 # Check that instructions that are recognized as branch targets by BTI
 # are not reordered by machine instruction schedulers.