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RISC-V: Bugfix for scalar move with merged operand
Given below example for VLS mode void test (vl_t *u) { vl_t t; long long *p = (long long *)&t; p[0] = p[1] = 2; *u = t; } The vec_set will simplify the insn to vmv.s.x when index is 0, without merged operand. That will result in some problems in DCE, aka: 1: 137[DI] = a0 2: 138[V2DI] = 134[V2DI] // deleted by DCE 3: 139[DI] = #2 // deleted by DCE 4: 140[DI] = #2 // deleted by DCE 5: 141[V2DI] = vec_dup:V2DI (139[DI]) // deleted by DCE 6: 138[V2DI] = vslideup_imm (138[V2DI], 141[V2DI], 1) // deleted by DCE 7: 135[V2DI] = 138[V2DI] // deleted by DCE 8: 142[V2DI] = 135[V2DI] // deleted by DCE 9: 143[DI] = #2 10: 142[V2DI] = vec_dup:V2DI (143[DI]) 11: (137[DI]) = 142[V2DI] The higher 64 bits of 142[V2DI] is unknown here and it generated incorrect code when store back to memory. This patch would like to fix this issue by adding a new SCALAR_MOVE_MERGED_OP for vec_set. Please note this patch doesn't enable VLS for vec_set, the underlying patches will support this soon. gcc/ChangeLog: * config/riscv/autovec.md: Bugfix. * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/scalar-move-merged-run-1.c: New test. Signed-off-by: Pan Li <[email protected]>
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gcc/config/riscv/autovec.md

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@@ -1401,9 +1401,9 @@
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/* If we set the first element, emit an v(f)mv.s.[xf]. */
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if (operands[2] == const0_rtx)
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{
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rtx ops[] = {operands[0], operands[1]};
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rtx ops[] = {operands[0], operands[0], operands[1]};
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riscv_vector::emit_nonvlmax_insn (code_for_pred_broadcast (<MODE>mode),
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riscv_vector::SCALAR_MOVE_OP, ops, CONST1_RTX (Pmode));
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riscv_vector::SCALAR_MOVE_MERGED_OP, ops, CONST1_RTX (Pmode));
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}
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else
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{

gcc/config/riscv/riscv-protos.h

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@@ -345,6 +345,10 @@ enum insn_type : unsigned int
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SCALAR_MOVE_OP = HAS_DEST_P | HAS_MASK_P | USE_ONE_TRUE_MASK_P | HAS_MERGE_P
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| USE_VUNDEF_MERGE_P | TDEFAULT_POLICY_P | MDEFAULT_POLICY_P
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| UNARY_OP_P,
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SCALAR_MOVE_MERGED_OP = HAS_DEST_P | HAS_MASK_P | USE_ONE_TRUE_MASK_P
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| HAS_MERGE_P | TDEFAULT_POLICY_P | MDEFAULT_POLICY_P
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| UNARY_OP_P,
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};
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enum vlmul_type
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/* { dg-do run { target { riscv_vector } } } */
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/* { dg-options "-O3 -Wno-psabi" } */
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#define TEST_VAL 2
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typedef long long vl_t __attribute__((vector_size(2 * sizeof (long long))));
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void init_vl (vl_t *u)
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{
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vl_t t;
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long long *p = (long long *)&t;
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p[0] = p[1] = TEST_VAL;
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*u = t;
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}
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int
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main ()
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{
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vl_t vl = {};
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init_vl (&vl);
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if (vl[0] != TEST_VAL || vl[1] != TEST_VAL)
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__builtin_abort ();
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return 0;
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}

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