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Merge branch 'main' into export-D87259044
2 parents fc87357 + f66b79f commit 35f22b8

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5 files changed

+9
-4
lines changed

5 files changed

+9
-4
lines changed

backends/cadence/aot/compiler.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ def convert_pt2(
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# It is however useful for unit tests to separate the converted model from the
145145
# fused model, to be able to get reference numerics.
146146
# If this does not apply, please use quantize_pt2 instead.
147-
def fuse_pt2(
147+
def apply_pre_edge_transform_passes(
148148
converted_program: ExportedProgram,
149149
quantizer: CadenceQuantizer,
150150
) -> ExportedProgram:
@@ -229,7 +229,7 @@ def quantize_pt2(
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230230
# Apply quant fusion to the exported program
231231
program = torch.export.export(converted_gm, inputs, strict=True)
232-
fused_program = fuse_pt2(program, quantizer)
232+
fused_program = apply_pre_edge_transform_passes(program, quantizer)
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234234
if dump_graphs:
235235
logging.info("Graph after quantization and fusion:")

backends/cadence/aot/export_example.py

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,8 @@
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from executorch.backends.cadence.aot.compiler import (
2020
_lower_ep_to_cadence_gen_etrecord,
21+
apply_pre_edge_transform_passes,
2122
convert_pt2,
22-
fuse_pt2,
2323
prepare_pt2,
2424
)
2525

@@ -66,7 +66,7 @@ def export_model(
6666
ep = torch.export.export(converted_model, example_inputs, strict=True)
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6868
# Fuse the quantized patterns on the exported program (note: quantizer needs to be the same as the one used in prepare_and_convert_pt2)
69-
ep = fuse_pt2(ep, quantizer)
69+
ep = apply_pre_edge_transform_passes(ep, quantizer)
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# Get edge program after Cadence specific passes
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exec_prog: ExecutorchProgramManager = _lower_ep_to_cadence_gen_etrecord(

backends/qualcomm/serialization/qc_compiler_spec.fbs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,7 @@ table HtpInfo {
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enum QcomChipset: int {
3535
UNKNOWN_SM = 0,
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SA8295 = 39,
37+
SM8350 = 35,
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SM8450 = 36,
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SM8475 = 42,
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SM8550 = 43,

backends/qualcomm/serialization/qc_schema.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,7 @@ class HtpInfo:
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class QcomChipset(IntEnum):
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UNKNOWN_SM = 0
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SA8295 = 39 # v68
43+
SM8350 = 35 # v68
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SM8450 = 36 # v69
4445
SM8475 = 42 # v69
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SM8550 = 43 # v73
@@ -63,6 +64,7 @@ class SocInfo:
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6465
_soc_info_table = {
6566
QcomChipset.SA8295: SocInfo(QcomChipset.SA8295, HtpInfo(HtpArch.V68, 8)),
67+
QcomChipset.SM8350: SocInfo(QcomChipset.SM8350, HtpInfo(HtpArch.V68, 4)),
6668
QcomChipset.SM8450: SocInfo(QcomChipset.SM8450, HtpInfo(HtpArch.V69, 8)),
6769
QcomChipset.SM8475: SocInfo(QcomChipset.SM8475, HtpInfo(HtpArch.V69, 8)),
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QcomChipset.SM8550: SocInfo(QcomChipset.SM8550, HtpInfo(HtpArch.V73, 8)),

backends/qualcomm/utils/utils.py

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1090,6 +1090,7 @@ def generate_qnn_executorch_compiler_spec(
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def get_soc_to_arch_map():
10911091
return {
10921092
"SA8295": HtpArch.V68,
1093+
"SM8350": HtpArch.V68,
10931094
"SM8450": HtpArch.V69,
10941095
"SM8475": HtpArch.V69,
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"SM8550": HtpArch.V73,
@@ -1109,6 +1110,7 @@ def get_soc_to_arch_map():
11091110
def get_soc_to_chipset_map():
11101111
return {
11111112
"SA8295": QcomChipset.SA8295,
1113+
"SM8350": QcomChipset.SM8350,
11121114
"SM8450": QcomChipset.SM8450,
11131115
"SM8475": QcomChipset.SM8475,
11141116
"SM8550": QcomChipset.SM8550,

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