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| 1 | +# Copyright 2025 Arm Limited and/or its affiliates. |
| 2 | +# |
| 3 | +# This source code is licensed under the BSD-style license found in the |
| 4 | +# LICENSE file in the root directory of this source tree. |
| 5 | + |
| 6 | +from typing import cast |
| 7 | + |
| 8 | +import torch |
| 9 | +import torch.fx as fx |
| 10 | +from executorch.backends.arm.operator_support.tosa_supported_operators import ( |
| 11 | + register_tosa_support_check, |
| 12 | + SupportedTOSAOperatorCheck, |
| 13 | +) |
| 14 | +from executorch.backends.arm.tosa_specification import Tosa_0_80, TosaSpecification |
| 15 | +from executorch.exir.dialects._ops import ops as exir_ops |
| 16 | + |
| 17 | + |
| 18 | +@register_tosa_support_check |
| 19 | +class ConvolutionSupported(SupportedTOSAOperatorCheck): |
| 20 | + targets = [exir_ops.edge.aten.convolution.default] |
| 21 | + |
| 22 | + tosa_specs = [ |
| 23 | + TosaSpecification.create_from_string("TOSA-0.80+BI"), |
| 24 | + TosaSpecification.create_from_string("TOSA-0.80+MI"), |
| 25 | + ] |
| 26 | + |
| 27 | + def is_node_supported(self, node: fx.Node, tosa_spec: TosaSpecification): |
| 28 | + |
| 29 | + # Not implemented |
| 30 | + transposed = cast(bool, node.args[6]) |
| 31 | + output_padding = cast(list[int], node.args[7]) |
| 32 | + if transposed: |
| 33 | + return False |
| 34 | + |
| 35 | + for pad in output_padding: |
| 36 | + if pad != 0: |
| 37 | + return False |
| 38 | + |
| 39 | + # Hardware specific constraints |
| 40 | + if not (isinstance(tosa_spec, Tosa_0_80) and tosa_spec.is_U55_subset): |
| 41 | + return True |
| 42 | + else: |
| 43 | + return self._is_node_supported_u55(node) |
| 44 | + |
| 45 | + def _is_node_supported_u55(self, node: fx.Node): |
| 46 | + """Hardware constraints for Ethos-U-55 case, Vela 4.2.0 (25.02 release)""" |
| 47 | + |
| 48 | + shape_in = cast(torch.Tensor, node.all_input_nodes[0].meta["val"]).shape |
| 49 | + shape_out = node.meta["val"].shape |
| 50 | + kernel = cast(fx.Node, node.args[1]).meta["val"].shape |
| 51 | + group = cast(int, node.args[8]) |
| 52 | + |
| 53 | + C_in = shape_in[1] |
| 54 | + C_out = shape_out[1] |
| 55 | + if (C_in == group) and (C_out % C_in) == 0: |
| 56 | + # Depthwise convolution |
| 57 | + for dim in shape_in[1:]: |
| 58 | + if not 1 <= dim <= 65536: |
| 59 | + return False |
| 60 | + else: |
| 61 | + # Convolution |
| 62 | + if not 1 <= C_in <= 65536: |
| 63 | + return False |
| 64 | + |
| 65 | + kernel_w = kernel[2] |
| 66 | + kernel_h = kernel[3] if len(kernel) > 3 else 1 |
| 67 | + # Kernel condition misses constraint on sum of absolute weights |
| 68 | + if not 1 <= kernel_h <= 64 or not 1 <= kernel_w * kernel_h <= 4096: |
| 69 | + return False |
| 70 | + |
| 71 | + if not self._stride_condition(node): |
| 72 | + return False |
| 73 | + |
| 74 | + return True |
| 75 | + |
| 76 | + def _stride_condition(self, node: fx.Node) -> bool: |
| 77 | + """This condition is somewhat complex but boils down |
| 78 | + to not supporting stride > 3, unless we have some special conditions. |
| 79 | + This condition is a simplified, relaxed version of the hardware constraint, |
| 80 | + since the actual constraint requires information not available |
| 81 | + here (without a lot of work). |
| 82 | +
|
| 83 | + This means that we might accept ops that are not actually supported. |
| 84 | + """ |
| 85 | + strides = cast(list[int], node.args[3]) |
| 86 | + has_padding = any(pad > 0 for pad in cast(list[int], node.args[4])) |
| 87 | + dilations = cast(list[int], node.args[5]) |
| 88 | + if len(dilations) == 1: |
| 89 | + dilations = [dilations[0]] * 2 |
| 90 | + if len(strides) == 1: |
| 91 | + strides = [strides[0]] * 2 |
| 92 | + |
| 93 | + for stride, dilation in zip(strides, dilations): |
| 94 | + stride_condition = 1 <= stride <= 3 |
| 95 | + dilation_condition = (not has_padding) and (dilation == 1) |
| 96 | + if (not stride_condition) and (not dilation_condition): |
| 97 | + return False |
| 98 | + |
| 99 | + return True |
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