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1 | 1 | SECTION .text |
2 | | -[BITS 16] |
| 2 | +USE16 |
| 3 | + |
3 | 4 | initialize: |
4 | 5 | .fpu: ;enable fpu |
5 | | - mov eax, cr4 |
6 | | - or eax, 0x200 |
7 | | - mov cr4, eax |
8 | | - mov eax, 0xB7F |
9 | | - push eax |
10 | | - fldcw [esp] |
11 | | - pop eax |
12 | | - ret |
| 6 | + mov eax, cr4 |
| 7 | + or eax, 0x200 |
| 8 | + mov cr4, eax |
| 9 | + mov eax, 0xB7F |
| 10 | + push eax |
| 11 | + fldcw [esp] |
| 12 | + pop eax |
| 13 | + ret |
13 | 14 |
|
14 | 15 | .sse: ;enable sse |
15 | | - mov eax, cr0 |
16 | | - and al, 11111011b |
17 | | - or al, 00000010b |
18 | | - mov cr0, eax |
19 | | - mov eax, cr4 |
20 | | - or ax, 0000011000000000b |
21 | | - mov cr4, eax |
22 | | - ret |
| 16 | + mov eax, cr0 |
| 17 | + and al, 11111011b |
| 18 | + or al, 00000010b |
| 19 | + mov cr0, eax |
| 20 | + mov eax, cr4 |
| 21 | + or ax, 0000011000000000b |
| 22 | + mov cr4, eax |
| 23 | + ret |
23 | 24 |
|
24 | 25 | ;PIT Frequency |
25 | 26 | ;If using nanoseconds, to minimize drift, one should find a frequency as close to an integer nanosecond value in wavelength |
26 | | -;Divider Hz Nanoseconds Properties |
27 | | -;2685 444.38795779019242706393 2250286.00003631746492922946 Best For Context Switching |
28 | | -;5370 222.19397889509621353196 4500572.00007263492985856020 |
29 | | -;21029 56.73981961418358774390 17624306.99991199998882825455 |
30 | | -;23714 50.31549576902532962244 19874592.99994831745375667118 |
31 | | -;26399 45.19798729749864262535 22124878.99998463491868476373 |
32 | | -;29084 41.02536331545408701233 24375165.00002095238361424615 |
33 | | -;31769 37.55804925136663623868 26625451.00005726984854313455 |
34 | | -;34454 34.63115071302799868423 28875737.00009358731347639618 |
35 | | -;50113 23.80982313305263437963 41999471.99993295237244784676 |
36 | | -;52798 22.59899364874932131267 44249757.99996926983737931766 |
37 | | -;55483 21.50535599492937776736 46500044.00000558730230583335 Lowest Drift |
38 | | -;58168 20.51268165772704350616 48750330.00004190476724037528 |
39 | | -;60853 19.60760630809765610021 51000616.00007822223218031738 |
| 27 | +;Divider Hz Nanoseconds Properties |
| 28 | +;2685 444.38795779019242706393 2250286.00003631746492922946 Best For Context Switching |
| 29 | +;5370 222.19397889509621353196 4500572.00007263492985856020 |
| 30 | +;21029 56.73981961418358774390 17624306.99991199998882825455 |
| 31 | +;23714 50.31549576902532962244 19874592.99994831745375667118 |
| 32 | +;26399 45.19798729749864262535 22124878.99998463491868476373 |
| 33 | +;29084 41.02536331545408701233 24375165.00002095238361424615 |
| 34 | +;31769 37.55804925136663623868 26625451.00005726984854313455 |
| 35 | +;34454 34.63115071302799868423 28875737.00009358731347639618 |
| 36 | +;50113 23.80982313305263437963 41999471.99993295237244784676 |
| 37 | +;52798 22.59899364874932131267 44249757.99996926983737931766 |
| 38 | +;55483 21.50535599492937776736 46500044.00000558730230583335 Lowest Drift |
| 39 | +;58168 20.51268165772704350616 48750330.00004190476724037528 |
| 40 | +;60853 19.60760630809765610021 51000616.00007822223218031738 |
40 | 41 |
|
41 | 42 | .pit: |
42 | | - ;initialize the PIT |
43 | | - mov ax, 2685 ;this is the divider for the PIT |
44 | | - out 0x40, al |
45 | | - rol ax, 8 |
46 | | - out 0x40, al |
47 | | - ;DISABLED ;enable rtc interrupt |
48 | | - ;mov al, 0xB |
49 | | - ;out 0x70, al |
50 | | - ;rol ax, 8 |
51 | | - ;in al, 0x71 |
52 | | - ;rol ax, 8 |
53 | | - ;out 0x70, al |
54 | | - ;rol ax, 8 |
55 | | - ;or al, 0x40 |
56 | | - ;out 0x71, al |
57 | | - ret |
| 43 | + ;initialize the PIT |
| 44 | + mov ax, 2685 ;this is the divider for the PIT |
| 45 | + out 0x40, al |
| 46 | + rol ax, 8 |
| 47 | + out 0x40, al |
| 48 | + ;DISABLED ;enable rtc interrupt |
| 49 | + ;mov al, 0xB |
| 50 | + ;out 0x70, al |
| 51 | + ;rol ax, 8 |
| 52 | + ;in al, 0x71 |
| 53 | + ;rol ax, 8 |
| 54 | + ;out 0x70, al |
| 55 | + ;rol ax, 8 |
| 56 | + ;or al, 0x40 |
| 57 | + ;out 0x71, al |
| 58 | + ret |
58 | 59 |
|
59 | | -.pic: ;sets up IRQs at int 20-2F |
60 | | - mov al, 0x11 |
61 | | - out 0x20, al |
62 | | - out 0xA0, al |
63 | | - mov al, 0x20 ;IRQ0 vector |
64 | | - out 0x21, al |
65 | | - mov al, 0x28 ;IRQ8 vector |
66 | | - out 0xA1, al |
67 | | - mov al, 4 |
68 | | - out 0x21, al |
69 | | - mov al, 2 |
70 | | - out 0xA1, al |
71 | | - mov al, 1 |
72 | | - out 0x21, al |
73 | | - out 0xA1, al |
74 | | - xor al, al ;no IRQ masks |
75 | | - out 0x21, al |
76 | | - out 0xA1, al |
77 | | - mov al, 0x20 ;reset PIC's |
78 | | - out 0xA0, al |
79 | | - out 0x20, al |
80 | | - ret |
| 60 | +.pic: ;sets up IRQs at int 20-2F |
| 61 | + mov al, 0x11 |
| 62 | + out 0x20, al |
| 63 | + out 0xA0, al |
| 64 | + mov al, 0x20 ;IRQ0 vector |
| 65 | + out 0x21, al |
| 66 | + mov al, 0x28 ;IRQ8 vector |
| 67 | + out 0xA1, al |
| 68 | + mov al, 4 |
| 69 | + out 0x21, al |
| 70 | + mov al, 2 |
| 71 | + out 0xA1, al |
| 72 | + mov al, 1 |
| 73 | + out 0x21, al |
| 74 | + out 0xA1, al |
| 75 | + xor al, al ;no IRQ masks |
| 76 | + out 0x21, al |
| 77 | + out 0xA1, al |
| 78 | + mov al, 0x20 ;reset PIC's |
| 79 | + out 0xA0, al |
| 80 | + out 0x20, al |
| 81 | + ret |
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