@@ -19,17 +19,22 @@ The general initialization steps at runtime are always the same:
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* Set the desired priority of the interrupt handler in the interrupt controller
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* Enable the interrupt handler in the interrupt controller
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- Similarly to exceptions, the ` cortex-m-rt ` crate provides an [ ` interrupt ` ]
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- attribute to declare interrupt handlers. The available interrupts (and
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- their position in the interrupt handler table) are usually automatically
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- generated via ` svd2rust ` from a SVD description.
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+ Similarly to exceptions, the cortex-m-rt crate exposes an [ ` interrupt ` ] attribute for declaring interrupt handlers. However, this
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+ attribute is only available when the device feature is enabled. That said, this attribute is not intended to be used directly—doing
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+ so will result in a compilation error.
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+
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+ Instead, you should use the re-exported version of the interrupt attribute provided by the device crate (usually generated using svd2rust).
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+ This ensures that the compiler can verify that the interrupt actually exists on the target device. The list of available interrupts—and
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+ their position in the interrupt vector table—is typically auto-generated from an SVD file by svd2rust.
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[ `interrupt` ] : https://docs.rs/cortex-m-rt-macros/0.1.5/cortex_m_rt_macros/attr.interrupt.html
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``` rust,ignore
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+ use lm3s6965::interrupt; // Re-exported attribute from the device crate
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+
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// Interrupt handler for the Timer2 interrupt
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#[interrupt]
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- fn TIM2 () {
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+ fn TIMER2A () {
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// ..
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// Clear reason for the generated interrupt request
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}
@@ -46,7 +51,7 @@ variables inside the interrupt handlers for *safe* state keeping.
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``` rust,ignore
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#[interrupt]
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- fn TIM2 () {
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+ fn TIMER2A () {
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static mut COUNT: u32 = 0;
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// `COUNT` has type `&mut u32` and it's safe to use
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