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1 parent a87fb18 commit 0d61e6eCopy full SHA for 0d61e6e
library/core/src/sync/atomic.rs
@@ -2714,7 +2714,7 @@ pub fn fence(order: Ordering) {
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/// Without `compiler_fence`, the `assert_eq!` in following code
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/// is *not* guaranteed to succeed, despite everything happening in a single thread.
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/// To see why, remember that the compiler is free to swap the stores to
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-/// `IMPORTANT_VARIABLE` and `IS_READ` since they are both
+/// `IMPORTANT_VARIABLE` and `IS_READY` since they are both
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/// `Ordering::Relaxed`. If it does, and the signal handler is invoked right
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/// after `IS_READY` is updated, then the signal handler will see
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/// `IS_READY=1`, but `IMPORTANT_VARIABLE=0`.
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