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1 parent 5de9a1e commit 961c518Copy full SHA for 961c518
compiler/rustc_codegen_cranelift/src/intrinsics/mod.rs
@@ -328,8 +328,8 @@ fn codegen_float_intrinsic_call<'tcx>(
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sym::fabsf64 => ("fabs", 1, fx.tcx.types.f64, types::F64),
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sym::fmaf32 => ("fmaf", 3, fx.tcx.types.f32, types::F32),
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sym::fmaf64 => ("fma", 3, fx.tcx.types.f64, types::F64),
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- sym::fmuladdf32 => ("fmaf", 3, fx.tcx.types.f32, types::F32), // NOTE: pessimal without FMA target feature
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- sym::fmuladdf64 => ("fma", 3, fx.tcx.types.f64, types::F64), // NOTE: pessimal without FMA target feature
+ sym::fmuladdf32 => ("fmaf", 3, fx.tcx.types.f32, types::F32), // NOTE: software emulation without FMA target feature
+ sym::fmuladdf64 => ("fma", 3, fx.tcx.types.f64, types::F64), // NOTE: software emulation without FMA target feature
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sym::copysignf32 => ("copysignf", 2, fx.tcx.types.f32, types::F32),
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sym::copysignf64 => ("copysign", 2, fx.tcx.types.f64, types::F64),
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sym::floorf32 => ("floorf", 1, fx.tcx.types.f32, types::F32),
library/std/src/f32/tests.rs
@@ -409,6 +409,7 @@ fn test_mul_add() {
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assert_eq!((-3.2f32).mul_add(2.4, neg_inf), neg_inf);
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}
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+#[cfg(not(bootstrap))]
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#[test]
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fn test_mul_add_fast() {
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let nan: f32 = f32::NAN;
library/std/src/f64/tests.rs
@@ -397,6 +397,7 @@ fn test_mul_add() {
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assert_eq!((-3.2f64).mul_add(2.4, neg_inf), neg_inf);
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let nan: f64 = f64::NAN;
src/tools/miri/src/lib.rs
@@ -2,7 +2,7 @@
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#![feature(cell_update)]
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#![feature(const_option)]
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#![feature(float_gamma)]
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-#![feature(float_mul_add_fast)]
+#![cfg_attr(not(bootstrap), feature(float_mul_add_fast))]
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#![feature(map_try_insert)]
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#![feature(never_type)]
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#![feature(try_blocks)]
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