@@ -15,6 +15,7 @@ use std::rt::stack;
15
15
use std:: raw;
16
16
#[ cfg( target_arch = "x86_64" ) ]
17
17
use std:: simd;
18
+ use libc;
18
19
19
20
// FIXME #7761: Registers is boxed so that it is 16-byte aligned, for storing
20
21
// SSE regs. It would be marginally better not to do this. In C++ we
@@ -69,7 +70,7 @@ impl Context {
69
70
// overflow). Additionally, their coroutine stacks are listed as being
70
71
// zero-length, so that's how we detect what's what here.
71
72
let stack_base: * const uint = stack. start ( ) ;
72
- let bounds = if sp as uint == stack_base as uint {
73
+ let bounds = if sp as libc :: uintptr_t == stack_base as libc :: uintptr_t {
73
74
None
74
75
} else {
75
76
Some ( ( stack_base as uint , sp as uint ) )
@@ -166,7 +167,7 @@ fn new_regs() -> Box<Registers> {
166
167
#[ cfg( target_arch = "x86" ) ]
167
168
fn initialize_call_frame ( regs : & mut Registers , fptr : InitFn , arg : uint ,
168
169
procedure : raw:: Procedure , sp : * mut uint ) {
169
-
170
+ let sp = sp as * mut uint ;
170
171
// x86 has interesting stack alignment requirements, so do some alignment
171
172
// plus some offsetting to figure out what the actual stack should be.
172
173
let sp = align_down ( sp) ;
@@ -188,13 +189,15 @@ fn initialize_call_frame(regs: &mut Registers, fptr: InitFn, arg: uint,
188
189
// windows requires saving more registers (both general and XMM), so the windows
189
190
// register context must be larger.
190
191
#[ cfg( windows, target_arch = "x86_64" ) ]
192
+ #[ repr( C ) ]
191
193
struct Registers {
192
- gpr : [ uint , ..14 ] ,
194
+ gpr : [ libc :: uintptr_t , ..14 ] ,
193
195
_xmm : [ simd:: u32x4 , ..10 ]
194
196
}
195
197
#[ cfg( not( windows) , target_arch = "x86_64" ) ]
198
+ #[ repr( C ) ]
196
199
struct Registers {
197
- gpr : [ uint , ..10 ] ,
200
+ gpr : [ libc :: uintptr_t , ..10 ] ,
198
201
_xmm : [ simd:: u32x4 , ..6 ]
199
202
}
200
203
@@ -234,30 +237,30 @@ fn initialize_call_frame(regs: &mut Registers, fptr: InitFn, arg: uint,
234
237
unsafe { * sp = 0 ; }
235
238
236
239
rtdebug ! ( "creating call frame" ) ;
237
- rtdebug ! ( "fptr {:#x}" , fptr as uint ) ;
240
+ rtdebug ! ( "fptr {:#x}" , fptr as libc :: uintptr_t ) ;
238
241
rtdebug ! ( "arg {:#x}" , arg) ;
239
242
rtdebug ! ( "sp {}" , sp) ;
240
243
241
244
// These registers are frobbed by rust_bootstrap_green_task into the right
242
245
// location so we can invoke the "real init function", `fptr`.
243
- regs. gpr [ RUSTRT_R12 ] = arg as uint ;
244
- regs. gpr [ RUSTRT_R13 ] = procedure. code as uint ;
245
- regs. gpr [ RUSTRT_R14 ] = procedure. env as uint ;
246
- regs. gpr [ RUSTRT_R15 ] = fptr as uint ;
246
+ regs. gpr [ RUSTRT_R12 ] = arg as libc :: uintptr_t ;
247
+ regs. gpr [ RUSTRT_R13 ] = procedure. code as libc :: uintptr_t ;
248
+ regs. gpr [ RUSTRT_R14 ] = procedure. env as libc :: uintptr_t ;
249
+ regs. gpr [ RUSTRT_R15 ] = fptr as libc :: uintptr_t ;
247
250
248
251
// These registers are picked up by the regular context switch paths. These
249
252
// will put us in "mostly the right context" except for frobbing all the
250
253
// arguments to the right place. We have the small trampoline code inside of
251
254
// rust_bootstrap_green_task to do that.
252
- regs. gpr [ RUSTRT_RSP ] = sp as uint ;
253
- regs. gpr [ RUSTRT_IP ] = rust_bootstrap_green_task as uint ;
255
+ regs. gpr [ RUSTRT_RSP ] = sp as libc :: uintptr_t ;
256
+ regs. gpr [ RUSTRT_IP ] = rust_bootstrap_green_task as libc :: uintptr_t ;
254
257
255
258
// Last base pointer on the stack should be 0
256
259
regs. gpr [ RUSTRT_RBP ] = 0 ;
257
260
}
258
261
259
262
#[ cfg( target_arch = "arm" ) ]
260
- type Registers = [ uint , ..32 ] ;
263
+ type Registers = [ libc :: uintptr_t , ..32 ] ;
261
264
262
265
#[ cfg( target_arch = "arm" ) ]
263
266
fn new_regs ( ) -> Box < Registers > { box { [ 0 , .. 32 ] } }
@@ -277,17 +280,17 @@ fn initialize_call_frame(regs: &mut Registers, fptr: InitFn, arg: uint,
277
280
// ARM uses the same technique as x86_64 to have a landing pad for the start
278
281
// of all new green tasks. Neither r1/r2 are saved on a context switch, so
279
282
// the shim will copy r3/r4 into r1/r2 and then execute the function in r5
280
- regs[ 0 ] = arg as uint ; // r0
281
- regs[ 3 ] = procedure. code as uint ; // r3
282
- regs[ 4 ] = procedure. env as uint ; // r4
283
- regs[ 5 ] = fptr as uint ; // r5
284
- regs[ 13 ] = sp as uint ; // #52 sp, r13
285
- regs[ 14 ] = rust_bootstrap_green_task as uint ; // #56 pc, r14 --> lr
283
+ regs[ 0 ] = arg as libc :: uintptr_t ; // r0
284
+ regs[ 3 ] = procedure. code as libc :: uintptr_t ; // r3
285
+ regs[ 4 ] = procedure. env as libc :: uintptr_t ; // r4
286
+ regs[ 5 ] = fptr as libc :: uintptr_t ; // r5
287
+ regs[ 13 ] = sp as libc :: uintptr_t ; // #52 sp, r13
288
+ regs[ 14 ] = rust_bootstrap_green_task as libc :: uintptr_t ; // #56 pc, r14 --> lr
286
289
}
287
290
288
291
#[ cfg( target_arch = "mips" ) ]
289
292
#[ cfg( target_arch = "mipsel" ) ]
290
- type Registers = [ uint , ..32 ] ;
293
+ type Registers = [ libc :: uintptr_t , ..32 ] ;
291
294
292
295
#[ cfg( target_arch = "mips" ) ]
293
296
#[ cfg( target_arch = "mipsel" ) ]
@@ -304,12 +307,12 @@ fn initialize_call_frame(regs: &mut Registers, fptr: InitFn, arg: uint,
304
307
// The final return address. 0 indicates the bottom of the stack
305
308
unsafe { * sp = 0 ; }
306
309
307
- regs[ 4 ] = arg as uint ;
308
- regs[ 5 ] = procedure. code as uint ;
309
- regs[ 6 ] = procedure. env as uint ;
310
- regs[ 29 ] = sp as uint ;
311
- regs[ 25 ] = fptr as uint ;
312
- regs[ 31 ] = fptr as uint ;
310
+ regs[ 4 ] = arg as libc :: uintptr_t ;
311
+ regs[ 5 ] = procedure. code as libc :: uintptr_t ;
312
+ regs[ 6 ] = procedure. env as libc :: uintptr_t ;
313
+ regs[ 29 ] = sp as libc :: uintptr_t ;
314
+ regs[ 25 ] = fptr as libc :: uintptr_t ;
315
+ regs[ 31 ] = fptr as libc :: uintptr_t ;
313
316
}
314
317
315
318
fn align_down ( sp : * mut uint ) -> * mut uint {
0 commit comments