diff --git a/compiler/rustc_abi/src/lib.rs b/compiler/rustc_abi/src/lib.rs
index ca15f7d992051..7fa869a509cc3 100644
--- a/compiler/rustc_abi/src/lib.rs
+++ b/compiler/rustc_abi/src/lib.rs
@@ -8,6 +8,38 @@
#![warn(unreachable_pub)]
// tidy-alphabetical-end
+/*! ABI handling for rustc
+
+## What is an "ABI"?
+
+Literally, "application binary interface", which means it is everything about how code interacts,
+at the machine level, with other code. This means it technically covers all of the following:
+- object binary format for e.g. relocations or offset tables
+- in-memory layout of types
+- procedure calling conventions
+
+When we discuss "ABI" in the context of rustc, we are probably discussing calling conventions.
+To describe those `rustc_abi` also covers type layout, as it must for values passed on the stack.
+Despite `rustc_abi` being about calling conventions, it is good to remember these usages exist.
+You will encounter all of them and more if you study target-specific codegen enough!
+Even in general conversation, when someone says "the Rust ABI is unstable", it may allude to
+either or both of
+- `repr(Rust)` types have a mostly-unspecified layout
+- `extern "Rust" fn(A) -> R` has an unspecified calling convention
+
+## Crate Goal
+
+ABI is a foundational concept, so the `rustc_abi` crate serves as an equally foundational crate.
+It cannot carry all details relevant to an ABI: those permeate code generation and linkage.
+Instead, `rustc_abi` is intended to provide the interface for reasoning about the binary interface.
+It should contain traits and types that other crates then use in their implementation.
+For example, a platform's `extern "C" fn` calling convention will be implemented in `rustc_target`
+but `rustc_abi` contains the types for calculating layout and describing register-passing.
+This makes it easier to describe things in the same way across targets, codegen backends, and
+even other Rust compilers, such as rust-analyzer!
+
+*/
+
use std::fmt;
#[cfg(feature = "nightly")]
use std::iter::Step;
diff --git a/compiler/rustc_ast/src/ast.rs b/compiler/rustc_ast/src/ast.rs
index 31e6750a6788c..3a81b93d157ce 100644
--- a/compiler/rustc_ast/src/ast.rs
+++ b/compiler/rustc_ast/src/ast.rs
@@ -241,15 +241,15 @@ impl AngleBracketedArg {
}
}
-impl Into
> for AngleBracketedArgs {
- fn into(self) -> P {
- P(GenericArgs::AngleBracketed(self))
+impl From for P {
+ fn from(val: AngleBracketedArgs) -> Self {
+ P(GenericArgs::AngleBracketed(val))
}
}
-impl Into> for ParenthesizedArgs {
- fn into(self) -> P {
- P(GenericArgs::Parenthesized(self))
+impl From for P {
+ fn from(val: ParenthesizedArgs) -> Self {
+ P(GenericArgs::Parenthesized(val))
}
}
diff --git a/compiler/rustc_ast/src/ptr.rs b/compiler/rustc_ast/src/ptr.rs
index 97c714df8fd2f..dd923305cdfd9 100644
--- a/compiler/rustc_ast/src/ptr.rs
+++ b/compiler/rustc_ast/src/ptr.rs
@@ -158,9 +158,9 @@ impl From> for P<[T]> {
}
}
-impl Into> for P<[T]> {
- fn into(self) -> Vec {
- self.into_vec()
+impl From> for Vec {
+ fn from(val: P<[T]>) -> Self {
+ val.into_vec()
}
}
diff --git a/compiler/rustc_codegen_llvm/src/back/owned_target_machine.rs b/compiler/rustc_codegen_llvm/src/back/owned_target_machine.rs
index 44c30d22a9e9c..4cbd49aa44d48 100644
--- a/compiler/rustc_codegen_llvm/src/back/owned_target_machine.rs
+++ b/compiler/rustc_codegen_llvm/src/back/owned_target_machine.rs
@@ -25,7 +25,7 @@ impl OwnedTargetMachine {
model: llvm::CodeModel,
reloc: llvm::RelocModel,
level: llvm::CodeGenOptLevel,
- use_soft_fp: bool,
+ float_abi: llvm::FloatAbi,
function_sections: bool,
data_sections: bool,
unique_section_names: bool,
@@ -57,7 +57,7 @@ impl OwnedTargetMachine {
model,
reloc,
level,
- use_soft_fp,
+ float_abi,
function_sections,
data_sections,
unique_section_names,
diff --git a/compiler/rustc_codegen_llvm/src/back/write.rs b/compiler/rustc_codegen_llvm/src/back/write.rs
index ae5e818d86f10..806f810627d51 100644
--- a/compiler/rustc_codegen_llvm/src/back/write.rs
+++ b/compiler/rustc_codegen_llvm/src/back/write.rs
@@ -26,7 +26,7 @@ use rustc_session::config::{
self, Lto, OutputType, Passes, RemapPathScopeComponents, SplitDwarfKind, SwitchWithOptPath,
};
use rustc_span::{BytePos, InnerSpan, Pos, SpanData, SyntaxContext, sym};
-use rustc_target::spec::{CodeModel, RelocModel, SanitizerSet, SplitDebuginfo, TlsModel};
+use rustc_target::spec::{CodeModel, FloatAbi, RelocModel, SanitizerSet, SplitDebuginfo, TlsModel};
use tracing::debug;
use crate::back::lto::ThinBuffer;
@@ -181,6 +181,14 @@ pub(crate) fn to_llvm_code_model(code_model: Option) -> llvm::CodeMod
}
}
+fn to_llvm_float_abi(float_abi: Option) -> llvm::FloatAbi {
+ match float_abi {
+ None => llvm::FloatAbi::Default,
+ Some(FloatAbi::Soft) => llvm::FloatAbi::Soft,
+ Some(FloatAbi::Hard) => llvm::FloatAbi::Hard,
+ }
+}
+
pub(crate) fn target_machine_factory(
sess: &Session,
optlvl: config::OptLevel,
@@ -189,12 +197,12 @@ pub(crate) fn target_machine_factory(
let reloc_model = to_llvm_relocation_model(sess.relocation_model());
let (opt_level, _) = to_llvm_opt_settings(optlvl);
- let use_softfp = if sess.target.arch == "arm" {
- sess.opts.cg.soft_float
+ let float_abi = if sess.target.arch == "arm" && sess.opts.cg.soft_float {
+ llvm::FloatAbi::Soft
} else {
// `validate_commandline_args_with_session_available` has already warned about this being
// ignored. Let's make sure LLVM doesn't suddenly start using this flag on more targets.
- false
+ to_llvm_float_abi(sess.target.llvm_floatabi)
};
let ffunction_sections =
@@ -290,7 +298,7 @@ pub(crate) fn target_machine_factory(
code_model,
reloc_model,
opt_level,
- use_softfp,
+ float_abi,
ffunction_sections,
fdata_sections,
funique_section_names,
diff --git a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
index 9a2bfd95562f2..128a147963b4a 100644
--- a/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
+++ b/compiler/rustc_codegen_llvm/src/llvm/ffi.rs
@@ -526,7 +526,7 @@ pub struct SanitizerOptions {
pub sanitize_kernel_address_recover: bool,
}
-/// LLVMRelocMode
+/// LLVMRustRelocModel
#[derive(Copy, Clone, PartialEq)]
#[repr(C)]
pub enum RelocModel {
@@ -538,6 +538,15 @@ pub enum RelocModel {
ROPI_RWPI,
}
+/// LLVMRustFloatABI
+#[derive(Copy, Clone, PartialEq)]
+#[repr(C)]
+pub enum FloatAbi {
+ Default,
+ Soft,
+ Hard,
+}
+
/// LLVMRustCodeModel
#[derive(Copy, Clone)]
#[repr(C)]
@@ -2192,7 +2201,7 @@ unsafe extern "C" {
Model: CodeModel,
Reloc: RelocModel,
Level: CodeGenOptLevel,
- UseSoftFP: bool,
+ FloatABIType: FloatAbi,
FunctionSections: bool,
DataSections: bool,
UniqueSectionNames: bool,
diff --git a/compiler/rustc_error_messages/src/lib.rs b/compiler/rustc_error_messages/src/lib.rs
index 74b6d63365a58..a51c4140e1760 100644
--- a/compiler/rustc_error_messages/src/lib.rs
+++ b/compiler/rustc_error_messages/src/lib.rs
@@ -357,9 +357,9 @@ impl From> for DiagMessage {
/// subdiagnostic derive refers to typed identifiers that are `DiagMessage`s, so need to be
/// able to convert between these, as much as they'll be converted back into `DiagMessage`
/// using `with_subdiagnostic_message` eventually. Don't use this other than for the derive.
-impl Into for DiagMessage {
- fn into(self) -> SubdiagMessage {
- match self {
+impl From for SubdiagMessage {
+ fn from(val: DiagMessage) -> Self {
+ match val {
DiagMessage::Str(s) => SubdiagMessage::Str(s),
DiagMessage::Translated(s) => SubdiagMessage::Translated(s),
DiagMessage::FluentIdentifier(id, None) => SubdiagMessage::FluentIdentifier(id),
diff --git a/compiler/rustc_errors/src/diagnostic.rs b/compiler/rustc_errors/src/diagnostic.rs
index 05b9cbfbc0664..afce877547f3e 100644
--- a/compiler/rustc_errors/src/diagnostic.rs
+++ b/compiler/rustc_errors/src/diagnostic.rs
@@ -156,9 +156,9 @@ impl IntoDiagArg for DiagArgValue {
}
}
-impl Into> for DiagArgValue {
- fn into(self) -> FluentValue<'static> {
- match self {
+impl From for FluentValue<'static> {
+ fn from(val: DiagArgValue) -> Self {
+ match val {
DiagArgValue::Str(s) => From::from(s),
DiagArgValue::Number(n) => From::from(n),
DiagArgValue::StrListSepByAnd(l) => fluent_value_from_str_list_sep_by_and(l),
diff --git a/compiler/rustc_hir/src/hir.rs b/compiler/rustc_hir/src/hir.rs
index 8cea269f29823..5ea3bcef9ba3b 100644
--- a/compiler/rustc_hir/src/hir.rs
+++ b/compiler/rustc_hir/src/hir.rs
@@ -4072,33 +4072,33 @@ impl<'hir> OwnerNode<'hir> {
}
}
-impl<'hir> Into> for &'hir Item<'hir> {
- fn into(self) -> OwnerNode<'hir> {
- OwnerNode::Item(self)
+impl<'hir> From<&'hir Item<'hir>> for OwnerNode<'hir> {
+ fn from(val: &'hir Item<'hir>) -> Self {
+ OwnerNode::Item(val)
}
}
-impl<'hir> Into> for &'hir ForeignItem<'hir> {
- fn into(self) -> OwnerNode<'hir> {
- OwnerNode::ForeignItem(self)
+impl<'hir> From<&'hir ForeignItem<'hir>> for OwnerNode<'hir> {
+ fn from(val: &'hir ForeignItem<'hir>) -> Self {
+ OwnerNode::ForeignItem(val)
}
}
-impl<'hir> Into> for &'hir ImplItem<'hir> {
- fn into(self) -> OwnerNode<'hir> {
- OwnerNode::ImplItem(self)
+impl<'hir> From<&'hir ImplItem<'hir>> for OwnerNode<'hir> {
+ fn from(val: &'hir ImplItem<'hir>) -> Self {
+ OwnerNode::ImplItem(val)
}
}
-impl<'hir> Into> for &'hir TraitItem<'hir> {
- fn into(self) -> OwnerNode<'hir> {
- OwnerNode::TraitItem(self)
+impl<'hir> From<&'hir TraitItem<'hir>> for OwnerNode<'hir> {
+ fn from(val: &'hir TraitItem<'hir>) -> Self {
+ OwnerNode::TraitItem(val)
}
}
-impl<'hir> Into> for OwnerNode<'hir> {
- fn into(self) -> Node<'hir> {
- match self {
+impl<'hir> From> for Node<'hir> {
+ fn from(val: OwnerNode<'hir>) -> Self {
+ match val {
OwnerNode::Item(n) => Node::Item(n),
OwnerNode::ForeignItem(n) => Node::ForeignItem(n),
OwnerNode::ImplItem(n) => Node::ImplItem(n),
diff --git a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
index 20859b167bc6b..de14c6d188365 100644
--- a/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
+++ b/compiler/rustc_llvm/llvm-wrapper/PassWrapper.cpp
@@ -308,6 +308,24 @@ static Reloc::Model fromRust(LLVMRustRelocModel RustReloc) {
report_fatal_error("Bad RelocModel.");
}
+enum class LLVMRustFloatABI {
+ Default,
+ Soft,
+ Hard,
+};
+
+static FloatABI::ABIType fromRust(LLVMRustFloatABI RustFloatAbi) {
+ switch (RustFloatAbi) {
+ case LLVMRustFloatABI::Default:
+ return FloatABI::Default;
+ case LLVMRustFloatABI::Soft:
+ return FloatABI::Soft;
+ case LLVMRustFloatABI::Hard:
+ return FloatABI::Hard;
+ }
+ report_fatal_error("Bad FloatABI.");
+}
+
/// getLongestEntryLength - Return the length of the longest entry in the table.
template static size_t getLongestEntryLength(ArrayRef Table) {
size_t MaxLen = 0;
@@ -358,7 +376,7 @@ extern "C" const char *LLVMRustGetHostCPUName(size_t *OutLen) {
extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
const char *TripleStr, const char *CPU, const char *Feature,
const char *ABIStr, LLVMRustCodeModel RustCM, LLVMRustRelocModel RustReloc,
- LLVMRustCodeGenOptLevel RustOptLevel, bool UseSoftFloat,
+ LLVMRustCodeGenOptLevel RustOptLevel, LLVMRustFloatABI RustFloatABIType,
bool FunctionSections, bool DataSections, bool UniqueSectionNames,
bool TrapUnreachable, bool Singlethread, bool VerboseAsm,
bool EmitStackSizeSection, bool RelaxELFRelocations, bool UseInitArray,
@@ -369,6 +387,7 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
auto OptLevel = fromRust(RustOptLevel);
auto RM = fromRust(RustReloc);
auto CM = fromRust(RustCM);
+ auto FloatABIType = fromRust(RustFloatABIType);
std::string Error;
auto Trip = Triple(Triple::normalize(TripleStr));
@@ -381,10 +400,7 @@ extern "C" LLVMTargetMachineRef LLVMRustCreateTargetMachine(
TargetOptions Options = codegen::InitTargetOptionsFromCodeGenFlags(Trip);
- Options.FloatABIType = FloatABI::Default;
- if (UseSoftFloat) {
- Options.FloatABIType = FloatABI::Soft;
- }
+ Options.FloatABIType = FloatABIType;
Options.DataSections = DataSections;
Options.FunctionSections = FunctionSections;
Options.UniqueSectionNames = UniqueSectionNames;
diff --git a/compiler/rustc_metadata/src/rmeta/mod.rs b/compiler/rustc_metadata/src/rmeta/mod.rs
index 64a1c70dd2ff8..4fe8f73efd601 100644
--- a/compiler/rustc_metadata/src/rmeta/mod.rs
+++ b/compiler/rustc_metadata/src/rmeta/mod.rs
@@ -303,9 +303,9 @@ pub(crate) struct RawDefId {
index: u32,
}
-impl Into for DefId {
- fn into(self) -> RawDefId {
- RawDefId { krate: self.krate.as_u32(), index: self.index.as_u32() }
+impl From for RawDefId {
+ fn from(val: DefId) -> Self {
+ RawDefId { krate: val.krate.as_u32(), index: val.index.as_u32() }
}
}
diff --git a/compiler/rustc_middle/src/mir/interpret/error.rs b/compiler/rustc_middle/src/mir/interpret/error.rs
index 37328470aa7e8..8c085fa310ab5 100644
--- a/compiler/rustc_middle/src/mir/interpret/error.rs
+++ b/compiler/rustc_middle/src/mir/interpret/error.rs
@@ -88,10 +88,10 @@ impl ReportedErrorInfo {
}
}
-impl Into for ReportedErrorInfo {
+impl From for ErrorGuaranteed {
#[inline]
- fn into(self) -> ErrorGuaranteed {
- self.error
+ fn from(val: ReportedErrorInfo) -> Self {
+ val.error
}
}
diff --git a/compiler/rustc_middle/src/mir/interpret/queries.rs b/compiler/rustc_middle/src/mir/interpret/queries.rs
index f7f38575bd035..4c47d9636d3f2 100644
--- a/compiler/rustc_middle/src/mir/interpret/queries.rs
+++ b/compiler/rustc_middle/src/mir/interpret/queries.rs
@@ -16,12 +16,12 @@ use crate::ty::{self, GenericArgs, TyCtxt};
impl<'tcx> TyCtxt<'tcx> {
/// Evaluates a constant without providing any generic parameters. This is useful to evaluate consts
/// that can't take any generic arguments like const items or enum discriminants. If a
- /// generic parameter is used within the constant `ErrorHandled::ToGeneric` will be returned.
+ /// generic parameter is used within the constant `ErrorHandled::TooGeneric` will be returned.
#[instrument(skip(self), level = "debug")]
pub fn const_eval_poly(self, def_id: DefId) -> EvalToConstValueResult<'tcx> {
// In some situations def_id will have generic parameters within scope, but they aren't allowed
// to be used. So we can't use `Instance::mono`, instead we feed unresolved generic parameters
- // into `const_eval` which will return `ErrorHandled::ToGeneric` if any of them are
+ // into `const_eval` which will return `ErrorHandled::TooGeneric` if any of them are
// encountered.
let args = GenericArgs::identity_for_item(self, def_id);
let instance = ty::Instance::new(def_id, args);
@@ -32,12 +32,12 @@ impl<'tcx> TyCtxt<'tcx> {
/// Evaluates a constant without providing any generic parameters. This is useful to evaluate consts
/// that can't take any generic arguments like const items or enum discriminants. If a
- /// generic parameter is used within the constant `ErrorHandled::ToGeneric` will be returned.
+ /// generic parameter is used within the constant `ErrorHandled::TooGeneric` will be returned.
#[instrument(skip(self), level = "debug")]
pub fn const_eval_poly_to_alloc(self, def_id: DefId) -> EvalToAllocationRawResult<'tcx> {
// In some situations def_id will have generic parameters within scope, but they aren't allowed
// to be used. So we can't use `Instance::mono`, instead we feed unresolved generic parameters
- // into `const_eval` which will return `ErrorHandled::ToGeneric` if any of them are
+ // into `const_eval` which will return `ErrorHandled::TooGeneric` if any of them are
// encountered.
let args = GenericArgs::identity_for_item(self, def_id);
let instance = ty::Instance::new(def_id, args);
@@ -201,12 +201,12 @@ impl<'tcx> TyCtxt<'tcx> {
impl<'tcx> TyCtxtEnsure<'tcx> {
/// Evaluates a constant without providing any generic parameters. This is useful to evaluate consts
/// that can't take any generic arguments like const items or enum discriminants. If a
- /// generic parameter is used within the constant `ErrorHandled::ToGeneric` will be returned.
+ /// generic parameter is used within the constant `ErrorHandled::TooGeneric` will be returned.
#[instrument(skip(self), level = "debug")]
pub fn const_eval_poly(self, def_id: DefId) {
// In some situations def_id will have generic parameters within scope, but they aren't allowed
// to be used. So we can't use `Instance::mono`, instead we feed unresolved generic parameters
- // into `const_eval` which will return `ErrorHandled::ToGeneric` if any of them are
+ // into `const_eval` which will return `ErrorHandled::TooGeneric` if any of them are
// encountered.
let args = GenericArgs::identity_for_item(self.tcx, def_id);
let instance = ty::Instance::new(def_id, self.tcx.erase_regions(args));
diff --git a/compiler/rustc_middle/src/ty/adt.rs b/compiler/rustc_middle/src/ty/adt.rs
index 8f4137cc01123..e28fcc555dcd1 100644
--- a/compiler/rustc_middle/src/ty/adt.rs
+++ b/compiler/rustc_middle/src/ty/adt.rs
@@ -249,9 +249,9 @@ pub enum AdtKind {
Enum,
}
-impl Into for AdtKind {
- fn into(self) -> DataTypeKind {
- match self {
+impl From for DataTypeKind {
+ fn from(val: AdtKind) -> Self {
+ match val {
AdtKind::Struct => DataTypeKind::Struct,
AdtKind::Union => DataTypeKind::Union,
AdtKind::Enum => DataTypeKind::Enum,
diff --git a/compiler/rustc_target/src/spec/base/apple/mod.rs b/compiler/rustc_target/src/spec/base/apple/mod.rs
index f45c86640936f..497994a5998cb 100644
--- a/compiler/rustc_target/src/spec/base/apple/mod.rs
+++ b/compiler/rustc_target/src/spec/base/apple/mod.rs
@@ -2,8 +2,8 @@ use std::borrow::Cow;
use std::env;
use crate::spec::{
- Cc, DebuginfoKind, FramePointer, LinkerFlavor, Lld, SplitDebuginfo, StackProbeType, StaticCow,
- TargetOptions, cvs,
+ Cc, DebuginfoKind, FloatAbi, FramePointer, LinkerFlavor, Lld, SplitDebuginfo, StackProbeType,
+ StaticCow, TargetOptions, cvs,
};
#[cfg(test)]
@@ -105,6 +105,7 @@ pub(crate) fn base(
) -> (TargetOptions, StaticCow, StaticCow) {
let opts = TargetOptions {
abi: abi.target_abi().into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
os: os.into(),
cpu: arch.target_cpu(abi).into(),
link_env_remove: link_env_remove(os),
diff --git a/compiler/rustc_target/src/spec/json.rs b/compiler/rustc_target/src/spec/json.rs
index 206766325aa16..9cdc0801b1f00 100644
--- a/compiler/rustc_target/src/spec/json.rs
+++ b/compiler/rustc_target/src/spec/json.rs
@@ -116,6 +116,18 @@ impl Target {
Some(Ok(()))
})).unwrap_or(Ok(()))
} );
+ ($key_name:ident, FloatAbi) => ( {
+ let name = (stringify!($key_name)).replace("_", "-");
+ obj.remove(&name).and_then(|o| o.as_str().and_then(|s| {
+ match s.parse::() {
+ Ok(float_abi) => base.$key_name = Some(float_abi),
+ _ => return Some(Err(format!("'{}' is not a valid value for \
+ llvm-floatabi. Use 'soft' or 'hard'.",
+ s))),
+ }
+ Some(Ok(()))
+ })).unwrap_or(Ok(()))
+ } );
($key_name:ident, RelocModel) => ( {
let name = (stringify!($key_name)).replace("_", "-");
obj.remove(&name).and_then(|o| o.as_str().and_then(|s| {
@@ -598,6 +610,7 @@ impl Target {
key!(mcount = "target-mcount");
key!(llvm_mcount_intrinsic, optional);
key!(llvm_abiname);
+ key!(llvm_floatabi, FloatAbi)?;
key!(relax_elf_relocations, bool);
key!(llvm_args, list);
key!(use_ctors_section, bool);
@@ -772,6 +785,7 @@ impl ToJson for Target {
target_option_val!(mcount, "target-mcount");
target_option_val!(llvm_mcount_intrinsic);
target_option_val!(llvm_abiname);
+ target_option_val!(llvm_floatabi);
target_option_val!(relax_elf_relocations);
target_option_val!(llvm_args);
target_option_val!(use_ctors_section);
diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs
index ad746d3f26b85..02962d55a60ed 100644
--- a/compiler/rustc_target/src/spec/mod.rs
+++ b/compiler/rustc_target/src/spec/mod.rs
@@ -1085,6 +1085,35 @@ impl ToJson for CodeModel {
}
}
+/// The float ABI setting to be configured in the LLVM target machine.
+#[derive(Clone, Copy, PartialEq, Hash, Debug)]
+pub enum FloatAbi {
+ Soft,
+ Hard,
+}
+
+impl FromStr for FloatAbi {
+ type Err = ();
+
+ fn from_str(s: &str) -> Result {
+ Ok(match s {
+ "soft" => FloatAbi::Soft,
+ "hard" => FloatAbi::Hard,
+ _ => return Err(()),
+ })
+ }
+}
+
+impl ToJson for FloatAbi {
+ fn to_json(&self) -> Json {
+ match *self {
+ FloatAbi::Soft => "soft",
+ FloatAbi::Hard => "hard",
+ }
+ .to_json()
+ }
+}
+
#[derive(Clone, Copy, PartialEq, Hash, Debug)]
pub enum TlsModel {
GeneralDynamic,
@@ -2150,6 +2179,8 @@ pub struct TargetOptions {
pub env: StaticCow,
/// ABI name to distinguish multiple ABIs on the same OS and architecture. For instance, `"eabi"`
/// or `"eabihf"`. Defaults to "".
+ /// This field is *not* forwarded directly to LLVM; its primary purpose is `cfg(target_abi)`.
+ /// However, parts of the backend do check this field for specific values to enable special behavior.
pub abi: StaticCow,
/// Vendor name to use for conditional compilation (`target_vendor`). Defaults to "unknown".
pub vendor: StaticCow,
@@ -2446,8 +2477,17 @@ pub struct TargetOptions {
pub llvm_mcount_intrinsic: Option>,
/// LLVM ABI name, corresponds to the '-mabi' parameter available in multilib C compilers
+ /// and the `-target-abi` flag in llc. In the LLVM API this is `MCOptions.ABIName`.
pub llvm_abiname: StaticCow,
+ /// Control the float ABI to use, for architectures that support it. The only architecture we
+ /// currently use this for is ARM. Corresponds to the `-float-abi` flag in llc. In the LLVM API
+ /// this is `FloatABIType`. (clang's `-mfloat-abi` is similar but more complicated since it
+ /// can also affect the `soft-float` target feature.)
+ ///
+ /// If not provided, LLVM will infer the float ABI from the target triple (`llvm_target`).
+ pub llvm_floatabi: Option,
+
/// Whether or not RelaxElfRelocation flag will be passed to the linker
pub relax_elf_relocations: bool,
@@ -2719,6 +2759,7 @@ impl Default for TargetOptions {
mcount: "mcount".into(),
llvm_mcount_intrinsic: None,
llvm_abiname: "".into(),
+ llvm_floatabi: None,
relax_elf_relocations: false,
llvm_args: cvs![],
use_ctors_section: false,
@@ -3153,7 +3194,8 @@ impl Target {
);
}
- // Check that RISC-V targets always specify which ABI they use.
+ // Check that RISC-V targets always specify which ABI they use,
+ // and that ARM targets specify their float ABI.
match &*self.arch {
"riscv32" => {
check_matches!(
@@ -3170,6 +3212,9 @@ impl Target {
"invalid RISC-V ABI name"
);
}
+ "arm" => {
+ check!(self.llvm_floatabi.is_some(), "ARM targets must specify their float ABI",)
+ }
_ => {}
}
diff --git a/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs
index 677d0f905b773..73fb02c67310c 100644
--- a/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs
+++ b/compiler/rustc_target/src/spec/targets/arm_linux_androideabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{SanitizerSet, Target, TargetOptions, base};
+use crate::spec::{FloatAbi, SanitizerSet, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// https://developer.android.com/ndk/guides/abis.html#armeabi
features: "+strict-align,+v5te".into(),
supported_sanitizers: SanitizerSet::ADDRESS,
diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs
index 5948d6b01f098..87e790a1f39e4 100644
--- a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+strict-align,+v6".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs
index 1e07a3cf2fda1..6470bf6b61157 100644
--- a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_gnueabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+strict-align,+v6,+vfp2,-d32".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs
index 416bb5432fd1c..26241dd0bd481 100644
--- a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs
+++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabi.rs
@@ -1,11 +1,8 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
- // It's important we use "gnueabi" and not "musleabi" here. LLVM uses it
- // to determine the calling convention and float ABI, and it doesn't
- // support the "musleabi" value.
- llvm_target: "arm-unknown-linux-gnueabi".into(),
+ llvm_target: "arm-unknown-linux-musleabi".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Armv6 Linux with musl 1.2.3".into()),
tier: Some(2),
@@ -17,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// Most of these settings are copied from the arm_unknown_linux_gnueabi
// target.
features: "+strict-align,+v6".into(),
diff --git a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs
index 909eb78f6983d..4bbde7667b976 100644
--- a/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/arm_unknown_linux_musleabihf.rs
@@ -1,11 +1,8 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
- // It's important we use "gnueabihf" and not "musleabihf" here. LLVM
- // uses it to determine the calling convention and float ABI, and it
- // doesn't support the "musleabihf" value.
- llvm_target: "arm-unknown-linux-gnueabihf".into(),
+ llvm_target: "arm-unknown-linux-musleabihf".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Armv6 Linux with musl 1.2.3, hardfloat".into()),
tier: Some(2),
@@ -17,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// Most of these settings are copied from the arm_unknown_linux_gnueabihf
// target.
features: "+strict-align,+v6,+vfp2,-d32".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs
index 07382a30863bb..bac9b39bbf2ae 100644
--- a/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armeb_unknown_linux_gnueabi.rs
@@ -1,5 +1,5 @@
use crate::abi::Endian;
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -15,6 +15,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+strict-align,+v8,+crc".into(),
endian: Endian::Big,
max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs
index d09624e0e7391..db774323e7be6 100644
--- a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabi.rs
@@ -1,7 +1,9 @@
// Targets the Big endian Cortex-R4/R5 processor (ARMv7-R)
use crate::abi::Endian;
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
endian: Endian::Big,
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
diff --git a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs
index 10669dcf09d79..de006a92668fb 100644
--- a/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armebv7r_none_eabihf.rs
@@ -1,7 +1,9 @@
// Targets the Cortex-R4F/R5F processor (ARMv7-R)
use crate::abi::Endian;
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
endian: Endian::Big,
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
diff --git a/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs
index 3d525ba403c7d..dc8cb4fb187ec 100644
--- a/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv4t_none_eabi.rs
@@ -9,7 +9,9 @@
//! The default link script is very likely wrong, so you should use
//! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script.
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs,
+};
pub(crate) fn target() -> Target {
Target {
@@ -34,6 +36,7 @@ pub(crate) fn target() -> Target {
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
asm_args: cvs!["-mthumb-interwork", "-march=armv4t", "-mlittle-endian",],
diff --git a/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs
index 7ca2babffe9fc..081132b0e68ca 100644
--- a/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv4t_unknown_linux_gnueabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+soft-float,+strict-align".into(),
// Atomic operations provided by compiler-builtins
max_atomic_width: Some(32),
diff --git a/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs
index 7f0a7791ca660..e0a4f26f0a6fd 100644
--- a/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv5te_none_eabi.rs
@@ -1,6 +1,6 @@
//! Targets the ARMv5TE, with code as `a32` code by default.
-use crate::spec::{FramePointer, Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, FramePointer, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -26,6 +26,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// extra args passed to the external assembler (assuming `arm-none-eabi-as`):
// * activate t32/a32 interworking
// * use arch ARMv5TE
diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs
index 9e8c81f133388..ce7060b384798 100644
--- a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_gnueabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+soft-float,+strict-align".into(),
// Atomic operations provided by compiler-builtins
max_atomic_width: Some(32),
diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs
index 5e3ad42e5a41e..62619546891de 100644
--- a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_musleabi.rs
@@ -1,12 +1,8 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
- // FIXME: this comment below does not seem applicable?
- // It's important we use "gnueabihf" and not "musleabihf" here. LLVM
- // uses it to determine the calling convention and float ABI, and LLVM
- // doesn't support the "musleabihf" value.
- llvm_target: "armv5te-unknown-linux-gnueabi".into(),
+ llvm_target: "armv5te-unknown-linux-musleabi".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Armv5TE Linux with musl 1.2.3".into()),
tier: Some(2),
@@ -18,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+soft-float,+strict-align".into(),
// Atomic operations provided by compiler-builtins
max_atomic_width: Some(32),
diff --git a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs
index 154103c36f79c..73013bf00b10b 100644
--- a/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv5te_unknown_linux_uclibceabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+soft-float,+strict-align".into(),
// Atomic operations provided by compiler-builtins
max_atomic_width: Some(32),
diff --git a/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs
index 75447479e1c1e..4bbc514f2b3de 100644
--- a/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/targets/armv6_unknown_freebsd.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v6,+vfp2,-d32".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs
index 6ed50df531498..6b9d3ccd2152f 100644
--- a/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv6_unknown_netbsd_eabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v6,+vfp2,-d32".into(),
max_atomic_width: Some(64),
mcount: "__mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs b/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs
index d78f62238b4a3..b323d2f86558e 100644
--- a/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs
+++ b/compiler/rustc_target/src/spec/targets/armv6k_nintendo_3ds.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Cc, LinkerFlavor, Lld, RelocModel, Target, TargetOptions, cvs};
+use crate::spec::{Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetOptions, cvs};
/// A base target for Nintendo 3DS devices using the devkitARM toolchain.
///
@@ -28,8 +28,9 @@ pub(crate) fn target() -> Target {
os: "horizon".into(),
env: "newlib".into(),
vendor: "nintendo".into(),
- abi: "eabihf".into(),
cpu: "mpcore".into(),
+ abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
families: cvs!["unix"],
linker: Some("arm-none-eabi-gcc".into()),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs
index 52a5402775012..e1cead9e0b7b8 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_linux_androideabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Cc, LinkerFlavor, Lld, SanitizerSet, Target, TargetOptions, base};
+use crate::spec::{Cc, FloatAbi, LinkerFlavor, Lld, SanitizerSet, Target, TargetOptions, base};
// This target if is for the baseline of the Android v7a ABI
// in thumb mode. It's named armv7-* instead of thumbv7-*
@@ -24,6 +24,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb-mode,+thumb2,+vfp3,-d32,-neon".into(),
supported_sanitizers: SanitizerSet::ADDRESS,
max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_rtems_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_rtems_eabihf.rs
index 4238c4c1c15f1..8c3bff2a90638 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_rtems_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_rtems_eabihf.rs
@@ -1,4 +1,6 @@
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions, cvs,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
os: "rtems".into(),
families: cvs!["unix"],
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
linker: None,
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
index 18843124d8e15..18d834597d87e 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_sony_vita_newlibeabihf.rs
@@ -1,5 +1,5 @@
use crate::abi::Endian;
-use crate::spec::{Cc, LinkerFlavor, Lld, RelocModel, Target, TargetOptions, cvs};
+use crate::spec::{Cc, FloatAbi, LinkerFlavor, Lld, RelocModel, Target, TargetOptions, cvs};
/// A base target for PlayStation Vita devices using the VITASDK toolchain (using newlib).
///
@@ -32,6 +32,7 @@ pub(crate) fn target() -> Target {
env: "newlib".into(),
vendor: "sony".into(),
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker_flavor: LinkerFlavor::Gnu(Cc::Yes, Lld::No),
no_default_libraries: false,
cpu: "cortex-a9".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs
index 11399b777a57e..34f118d4f5ddd 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_freebsd.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs
index 240edd8a3560b..bb28427c99bf5 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for glibc Linux on ARMv7 without thumb-mode, NEON or
// hardfloat.
@@ -17,6 +17,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}__gnu_mcount_nc".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs
index eedaa6b32209c..6bffc0da87b01 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_gnueabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for glibc Linux on ARMv7 without NEON or
// thumb-mode. See the thumbv7neon variant for enabling both.
@@ -17,6 +17,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// Info about features at https://wiki.debian.org/ArmHardFloatPort
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs
index 843adcfc71116..0436e0d8df4ce 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for musl Linux on ARMv7 without thumb-mode, NEON or
// hardfloat.
@@ -7,10 +7,7 @@ pub(crate) fn target() -> Target {
// Most of these settings are copied from the armv7_unknown_linux_gnueabi
// target.
Target {
- // It's important we use "gnueabi" and not "musleabi" here. LLVM uses it
- // to determine the calling convention and float ABI, and it doesn't
- // support the "musleabi" value.
- llvm_target: "armv7-unknown-linux-gnueabi".into(),
+ llvm_target: "armv7-unknown-linux-musleabi".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Armv7-A Linux with musl 1.2.3".into()),
tier: Some(2),
@@ -23,6 +20,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs
index e0630817bc3ae..22e49f2f1b0b8 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_musleabihf.rs
@@ -1,13 +1,10 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for musl Linux on ARMv7 without thumb-mode or NEON.
pub(crate) fn target() -> Target {
Target {
- // It's important we use "gnueabihf" and not "musleabihf" here. LLVM
- // uses it to determine the calling convention and float ABI, and LLVM
- // doesn't support the "musleabihf" value.
- llvm_target: "armv7-unknown-linux-gnueabihf".into(),
+ llvm_target: "armv7-unknown-linux-musleabihf".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Armv7-A Linux with musl 1.2.3, hardfloat".into()),
tier: Some(2),
@@ -22,6 +19,7 @@ pub(crate) fn target() -> Target {
// target.
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs
index 92b09bcc45c48..d1261202124c8 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_ohos.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for OpenHarmony on ARMv7 Linux with thumb-mode, but no NEON or
// hardfloat.
@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs
index 0cc128940211d..ffcd8876eb4c8 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for uclibc Linux on ARMv7 without NEON,
// thumb-mode or hardfloat.
@@ -18,11 +18,12 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
+ abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb2,+soft-float,-neon".into(),
cpu: "generic".into(),
max_atomic_width: Some(64),
mcount: "_mcount".into(),
- abi: "eabi".into(),
..base
},
}
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs
index abf7f122adf02..586bd8d3d883e 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_linux_uclibceabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for uclibc Linux on ARMv7 without NEON or
// thumb-mode. See the thumbv7neon variant for enabling both.
@@ -24,6 +24,7 @@ pub(crate) fn target() -> Target {
max_atomic_width: Some(64),
mcount: "_mcount".into(),
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
..base
},
}
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs
index a639bf99d3c4a..28d3d572bf35d 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_netbsd_eabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
max_atomic_width: Some(64),
mcount: "__mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_unknown_trusty.rs b/compiler/rustc_target/src/spec/targets/armv7_unknown_trusty.rs
index 1ad91b8f080e7..b86c788df15f6 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_unknown_trusty.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_unknown_trusty.rs
@@ -1,4 +1,6 @@
-use crate::spec::{LinkSelfContainedDefault, PanicStrategy, RelroLevel, Target, TargetOptions};
+use crate::spec::{
+ FloatAbi, LinkSelfContainedDefault, PanicStrategy, RelroLevel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb2,+soft-float,-neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs
index e815a646a4fa6..212c45424dbb5 100644
--- a/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7_wrs_vxworks_eabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -14,6 +14,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// Info about features at https://wiki.debian.org/ArmHardFloatPort
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs
index e5ae1064d9716..2ed1004541265 100644
--- a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{RelocModel, Target, TargetOptions, base};
+use crate::spec::{FloatAbi, RelocModel, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
let base = base::solid::opts("asp3");
@@ -15,6 +15,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
linker: Some("arm-kmc-eabi-gcc".into()),
features: "+v7,+soft-float,+thumb2,-neon".into(),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs
index 0879fa24a1b73..c9c15b402ae87 100644
--- a/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7a_kmc_solid_asp3_eabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{RelocModel, Target, TargetOptions, base};
+use crate::spec::{FloatAbi, RelocModel, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
let base = base::solid::opts("asp3");
@@ -15,6 +15,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker: Some("arm-kmc-eabi-gcc".into()),
features: "+v7,+vfp3,-d32,+thumb2,-neon".into(),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
index 1e4798abfffb0..d59849ec2c4b1 100644
--- a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
@@ -14,11 +14,14 @@
// - `relocation-model` set to `static`; also no PIE, no relro and no dynamic
// linking. rationale: matches `thumb` targets
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
let opts = TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
features: "+v7,+thumb2,+soft-float,-neon,+strict-align".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs
index ab8b870c62859..06481e6f88253 100644
--- a/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabihf.rs
@@ -5,11 +5,14 @@
// changes (list in `armv7a_none_eabi.rs`) to bring it closer to the bare-metal
// `thumb` & `aarch64` targets.
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
let opts = TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
features: "+v7,+vfp3,-d32,+thumb2,-neon,+strict-align".into(),
diff --git a/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs
index aba55f533a71d..1eda05451691a 100644
--- a/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7r_none_eabi.rs
@@ -1,6 +1,8 @@
// Targets the Little-endian Cortex-R4/R5 processor (ARMv7-R)
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs
index 5a8519dcc49d0..d4e85bc9b0aea 100644
--- a/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv7r_none_eabihf.rs
@@ -1,6 +1,8 @@
// Targets the Little-endian Cortex-R4F/R5F processor (ARMv7-R)
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/armv8r_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/armv8r_none_eabihf.rs
index 762084291a696..3df42a1482c18 100644
--- a/compiler/rustc_target/src/spec/targets/armv8r_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/armv8r_none_eabihf.rs
@@ -1,6 +1,8 @@
// Targets the Little-endian Cortex-R52 processor (ARMv8-R)
-use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions};
+use crate::spec::{
+ Cc, FloatAbi, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions,
+};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +19,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes),
linker: Some("rust-lld".into()),
relocation_model: RelocModel::Static,
diff --git a/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs
index 6368cbfe7c21d..b0eefcab209e2 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv4t_none_eabi.rs
@@ -9,7 +9,9 @@
//! The default link script is very likely wrong, so you should use
//! `-Clink-arg=-Tmy_script.ld` to override that with a correct linker script.
-use crate::spec::{FramePointer, PanicStrategy, RelocModel, Target, TargetOptions, base, cvs};
+use crate::spec::{
+ FloatAbi, FramePointer, PanicStrategy, RelocModel, Target, TargetOptions, base, cvs,
+};
pub(crate) fn target() -> Target {
Target {
@@ -34,6 +36,7 @@ pub(crate) fn target() -> Target {
data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// extra args passed to the external assembler (assuming `arm-none-eabi-as`):
// * activate t32/a32 interworking
diff --git a/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs
index afd48e6ea1669..1439e4a939f0b 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv5te_none_eabi.rs
@@ -1,6 +1,6 @@
//! Targets the ARMv5TE, with code as `t32` code by default.
-use crate::spec::{FramePointer, Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, FramePointer, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -26,6 +26,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// extra args passed to the external assembler (assuming `arm-none-eabi-as`):
// * activate t32/a32 interworking
// * use arch ARMv5TE
diff --git a/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs
index 1eac51b8e0a77..4333a9c631c89 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv6m_none_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +17,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
// with +strict-align.
// Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
diff --git a/compiler/rustc_target/src/spec/targets/thumbv6m_nuttx_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv6m_nuttx_eabi.rs
index 0a6dc88c1457b..5799bbf551f8b 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv6m_nuttx_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv6m_nuttx_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
// with +strict-align.
// Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs
index 861604987f84c..a62d03ba0d32d 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7a_pc_windows_msvc.rs
@@ -1,4 +1,4 @@
-use crate::spec::{LinkerFlavor, Lld, PanicStrategy, Target, TargetOptions, base};
+use crate::spec::{FloatAbi, LinkerFlavor, Lld, PanicStrategy, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
let mut base = base::windows_msvc::opts();
@@ -23,6 +23,7 @@ pub(crate) fn target() -> Target {
data_layout: "e-m:w-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
options: TargetOptions {
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+vfp3,+neon".into(),
max_atomic_width: Some(64),
// FIXME(jordanrh): use PanicStrategy::Unwind when SEH is
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs b/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs
index bb30f81fb20b5..c9df66253b36f 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7a_uwp_windows_msvc.rs
@@ -1,4 +1,4 @@
-use crate::spec::{PanicStrategy, Target, TargetOptions, base};
+use crate::spec::{FloatAbi, PanicStrategy, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -13,6 +13,7 @@ pub(crate) fn target() -> Target {
data_layout: "e-m:w-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
arch: "arm".into(),
options: TargetOptions {
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+vfp3,+neon".into(),
max_atomic_width: Some(64),
// FIXME(jordanrh): use PanicStrategy::Unwind when SEH is
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs
index d35d30c34a31c..b5cf8ce74f4c3 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabi.rs
@@ -9,7 +9,7 @@
// To opt-in to hardware accelerated floating point operations, you can use, for example,
// `-C target-feature=+vfp4` or `-C target-cpu=cortex-m4`.
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -26,6 +26,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs
index c439059728280..c7b54b94efa7c 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7em_none_eabihf.rs
@@ -8,7 +8,7 @@
//
// To opt into double precision hardware support, use the `-C target-feature=+fp64` flag.
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -25,6 +25,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// vfp4 is the lowest common denominator between the Cortex-M4F (vfp4) and the
// Cortex-M7 (vfp5).
// Both the Cortex-M4 and the Cortex-M7 only have 16 double-precision registers
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabi.rs
index 0f3457402a593..536d128590fb4 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabi.rs
@@ -9,7 +9,7 @@
// To opt-in to hardware accelerated floating point operations, you can use, for example,
// `-C target-feature=+vfp4` or `-C target-cpu=cortex-m4`.
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -28,6 +28,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabihf.rs
index 99612e132a9d0..35e92b81d87da 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7em_nuttx_eabihf.rs
@@ -8,7 +8,7 @@
//
// To opt into double precision hardware support, use the `-C target-feature=+fp64` flag.
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -27,6 +27,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// vfp4 is the lowest common denominator between the Cortex-M4F (vfp4) and the
// Cortex-M7 (vfp5).
// Both the Cortex-M4 and the Cortex-M7 only have 16 double-precision registers
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs
index 1727add111509..50f7bc1f810ad 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7m_none_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M3 processor (ARMv7-M)
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +17,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7m_nuttx_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7m_nuttx_eabi.rs
index 07c19376a311a..320867444ad29 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7m_nuttx_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7m_nuttx_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M3 processor (ARMv7-M)
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs
index 19bb515e3c306..de3ac26a2bd9c 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_linux_androideabi.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Cc, LinkerFlavor, Lld, Target, TargetOptions, base};
+use crate::spec::{Cc, FloatAbi, LinkerFlavor, Lld, Target, TargetOptions, base};
// This target if is for the Android v7a ABI in thumb mode with
// NEON unconditionally enabled and, therefore, with 32 FPU registers
@@ -24,6 +24,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(),
max_atomic_width: Some(64),
..base
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs
index 45de2e82f5a88..120f13ae56d73 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_gnueabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for glibc Linux on ARMv7 with thumb mode enabled
// (for consistency with Android and Debian-based distributions)
@@ -22,6 +22,7 @@ pub(crate) fn target() -> Target {
arch: "arm".into(),
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// Info about features at https://wiki.debian.org/ArmHardFloatPort
features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(),
max_atomic_width: Some(64),
diff --git a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs
index a0852b4611ecd..1149b6d16eb2b 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv7neon_unknown_linux_musleabihf.rs
@@ -1,4 +1,4 @@
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
// This target is for musl Linux on ARMv7 with thumb mode enabled
// (for consistency with Android and Debian-based distributions)
@@ -8,10 +8,7 @@ use crate::spec::{Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
- // It's important we use "gnueabihf" and not "musleabihf" here. LLVM
- // uses it to determine the calling convention and float ABI, and LLVM
- // doesn't support the "musleabihf" value.
- llvm_target: "armv7-unknown-linux-gnueabihf".into(),
+ llvm_target: "armv7-unknown-linux-musleabihf".into(),
metadata: crate::spec::TargetMetadata {
description: Some("Thumb2-mode ARMv7-A Linux with NEON, musl 1.2.3".into()),
tier: Some(3),
@@ -26,6 +23,7 @@ pub(crate) fn target() -> Target {
// target.
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
features: "+v7,+thumb-mode,+thumb2,+vfp3,+neon".into(),
max_atomic_width: Some(64),
mcount: "\u{1}mcount".into(),
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs
index 3856cdff05c77..823fb828e4dfc 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_base_none_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M23 processor (Baseline ARMv8-M)
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -17,6 +17,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// ARMv8-M baseline doesn't support unaligned loads/stores so we disable them
// with +strict-align.
features: "+strict-align".into(),
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_base_nuttx_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_base_nuttx_eabi.rs
index 9f493b6904594..1af01b97666fe 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_base_nuttx_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_base_nuttx_eabi.rs
@@ -1,6 +1,6 @@
// Targets the Cortex-M23 processor (Baseline ARMv8-M)
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -19,6 +19,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
// ARMv8-M baseline doesn't support unaligned loads/stores so we disable them
// with +strict-align.
features: "+strict-align".into(),
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs
index 3f8d20f48f76d..47304e3027d93 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabi.rs
@@ -1,7 +1,7 @@
// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile),
// without the Floating Point extension.
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -18,6 +18,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs
index 7c8fa078e2628..ddb5132ba6054 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_none_eabihf.rs
@@ -1,7 +1,7 @@
// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile),
// with the Floating Point extension.
-use crate::spec::{Target, TargetOptions, base};
+use crate::spec::{FloatAbi, Target, TargetOptions, base};
pub(crate) fn target() -> Target {
Target {
@@ -18,6 +18,7 @@ pub(crate) fn target() -> Target {
options: TargetOptions {
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// If the Floating Point extension is implemented in the Cortex-M33
// processor, the Cortex-M33 Technical Reference Manual states that
// the FPU uses the FPv5 architecture, single-precision instructions
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabi.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabi.rs
index f73360e8501ac..661d74217adf6 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabi.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabi.rs
@@ -1,7 +1,7 @@
// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile),
// without the Floating Point extension.
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabi".into(),
+ llvm_floatabi: Some(FloatAbi::Soft),
max_atomic_width: Some(32),
..base::thumb::opts()
},
diff --git a/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabihf.rs b/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabihf.rs
index cf642e3189612..484d35bfc2028 100644
--- a/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabihf.rs
+++ b/compiler/rustc_target/src/spec/targets/thumbv8m_main_nuttx_eabihf.rs
@@ -1,7 +1,7 @@
// Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile),
// with the Floating Point extension.
-use crate::spec::{Target, TargetOptions, base, cvs};
+use crate::spec::{FloatAbi, Target, TargetOptions, base, cvs};
pub(crate) fn target() -> Target {
Target {
@@ -20,6 +20,7 @@ pub(crate) fn target() -> Target {
families: cvs!["unix"],
os: "nuttx".into(),
abi: "eabihf".into(),
+ llvm_floatabi: Some(FloatAbi::Hard),
// If the Floating Point extension is implemented in the Cortex-M33
// processor, the Cortex-M33 Technical Reference Manual states that
// the FPU uses the FPv5 architecture, single-precision instructions
diff --git a/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs b/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs
index 2dcf3760d2f74..68a5338123049 100644
--- a/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs
+++ b/compiler/rustc_trait_selection/src/error_reporting/infer/need_type_info.rs
@@ -45,12 +45,12 @@ pub enum TypeAnnotationNeeded {
E0284,
}
-impl Into for TypeAnnotationNeeded {
- fn into(self) -> ErrCode {
- match self {
- Self::E0282 => E0282,
- Self::E0283 => E0283,
- Self::E0284 => E0284,
+impl From for ErrCode {
+ fn from(val: TypeAnnotationNeeded) -> Self {
+ match val {
+ TypeAnnotationNeeded::E0282 => E0282,
+ TypeAnnotationNeeded::E0283 => E0283,
+ TypeAnnotationNeeded::E0284 => E0284,
}
}
}
diff --git a/compiler/rustc_trait_selection/src/traits/select/confirmation.rs b/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
index 962b6b94fa625..3619d16cde248 100644
--- a/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
+++ b/compiler/rustc_trait_selection/src/traits/select/confirmation.rs
@@ -896,6 +896,10 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
sig.tupled_inputs_ty,
])
});
+
+ // Note that unlike below, we don't need to check `Future + Sized` for
+ // the output coroutine because they are `Future + Sized` by construction.
+
(trait_ref, args.kind_ty())
}
ty::FnDef(..) | ty::FnPtr(..) => {
@@ -907,7 +911,7 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
])
});
- // We must additionally check that the return type impls `Future`.
+ // We must additionally check that the return type impls `Future + Sized`.
let future_trait_def_id = tcx.require_lang_item(LangItem::Future, None);
nested.push(obligation.with(
tcx,
@@ -915,6 +919,13 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
ty::TraitRef::new(tcx, future_trait_def_id, [output_ty])
}),
));
+ let sized_trait_def_id = tcx.require_lang_item(LangItem::Sized, None);
+ nested.push(obligation.with(
+ tcx,
+ sig.output().map_bound(|output_ty| {
+ ty::TraitRef::new(tcx, sized_trait_def_id, [output_ty])
+ }),
+ ));
(trait_ref, Ty::from_closure_kind(tcx, ty::ClosureKind::Fn))
}
@@ -928,14 +939,20 @@ impl<'cx, 'tcx> SelectionContext<'cx, 'tcx> {
])
});
- // We must additionally check that the return type impls `Future`.
- // See FIXME in last branch for why we instantiate the binder eagerly.
+ // We must additionally check that the return type impls `Future + Sized`.
let future_trait_def_id = tcx.require_lang_item(LangItem::Future, None);
let placeholder_output_ty = self.infcx.enter_forall_and_leak_universe(sig.output());
nested.push(obligation.with(
tcx,
ty::TraitRef::new(tcx, future_trait_def_id, [placeholder_output_ty]),
));
+ let sized_trait_def_id = tcx.require_lang_item(LangItem::Sized, None);
+ nested.push(obligation.with(
+ tcx,
+ sig.output().map_bound(|output_ty| {
+ ty::TraitRef::new(tcx, sized_trait_def_id, [output_ty])
+ }),
+ ));
(trait_ref, args.kind_ty())
}
diff --git a/library/core/src/ptr/mod.rs b/library/core/src/ptr/mod.rs
index ac074c097d94c..dd61848d6e8be 100644
--- a/library/core/src/ptr/mod.rs
+++ b/library/core/src/ptr/mod.rs
@@ -15,8 +15,8 @@
//! The precise rules for validity are not determined yet. The guarantees that are
//! provided at this point are very minimal:
//!
-//! * For operations of [size zero][zst], *every* pointer is valid, including the [null] pointer.
-//! The following points are only concerned with non-zero-sized accesses.
+//! * For memory accesses of [size zero][zst], *every* pointer is valid, including the [null]
+//! pointer. The following points are only concerned with non-zero-sized accesses.
//! * A [null] pointer is *never* valid.
//! * For a pointer to be valid, it is necessary, but not always sufficient, that the pointer be
//! *dereferenceable*. The [provenance] of the pointer is used to determine which [allocated
diff --git a/library/core/src/slice/mod.rs b/library/core/src/slice/mod.rs
index 3e8c698a7aba4..df9720698d32f 100644
--- a/library/core/src/slice/mod.rs
+++ b/library/core/src/slice/mod.rs
@@ -4821,7 +4821,8 @@ impl [[T; N]] {
/// assert_eq!(array, [[6, 7, 8], [9, 10, 11], [12, 13, 14]]);
/// ```
#[stable(feature = "slice_flatten", since = "1.80.0")]
- pub fn as_flattened_mut(&mut self) -> &mut [T] {
+ #[rustc_const_unstable(feature = "const_slice_flatten", issue = "95629")]
+ pub const fn as_flattened_mut(&mut self) -> &mut [T] {
let len = if T::IS_ZST {
self.len().checked_mul(N).expect("slice len overflow")
} else {
diff --git a/src/bootstrap/src/core/builder/mod.rs b/src/bootstrap/src/core/builder/mod.rs
index 18beaf3676d5f..b000d8775cfcf 100644
--- a/src/bootstrap/src/core/builder/mod.rs
+++ b/src/bootstrap/src/core/builder/mod.rs
@@ -922,13 +922,17 @@ impl<'a> Builder<'a> {
test::Incremental,
test::Debuginfo,
test::UiFullDeps,
- test::CodegenCranelift,
- test::CodegenGCC,
test::Rustdoc,
test::CoverageRunRustdoc,
test::Pretty,
test::Crate,
test::CrateLibrustc,
+ // The cranelift and gcc tests need to be listed after the
+ // compiler unit tests (CrateLibrustc) so that they don't
+ // hijack the whole `compiler` directory during path matching.
+ //
+ test::CodegenCranelift,
+ test::CodegenGCC,
test::CrateRustdoc,
test::CrateRustdocJsonTypes,
test::CrateBootstrap,
diff --git a/src/bootstrap/src/core/builder/tests.rs b/src/bootstrap/src/core/builder/tests.rs
index a0acd83937441..21694cf46fe21 100644
--- a/src/bootstrap/src/core/builder/tests.rs
+++ b/src/bootstrap/src/core/builder/tests.rs
@@ -786,3 +786,21 @@ mod sysroot_target_dirs {
);
}
}
+
+/// Regression test for .
+///
+/// The command `./x test compiler` should invoke the step that runs unit tests
+/// for (most) compiler crates; it should not be hijacked by the cg_clif or
+/// cg_gcc tests instead.
+#[test]
+fn test_test_compiler() {
+ let cmd = &["test", "compiler"].map(str::to_owned);
+ let config = configure_with_args(cmd, &[TEST_TRIPLE_1], &[TEST_TRIPLE_1]);
+ let cache = run_build(&config.paths.clone(), config);
+
+ let compiler = cache.contains::();
+ let cranelift = cache.contains::();
+ let gcc = cache.contains::();
+
+ assert_eq!((compiler, cranelift, gcc), (true, false, false));
+}
diff --git a/tests/ui/async-await/async-closures/async-future-out-must-be-sized.rs b/tests/ui/async-await/async-closures/async-future-out-must-be-sized.rs
new file mode 100644
index 0000000000000..e5d70e30eb5f6
--- /dev/null
+++ b/tests/ui/async-await/async-closures/async-future-out-must-be-sized.rs
@@ -0,0 +1,20 @@
+//@ edition: 2021
+
+// Ensure that the output of a `fn` pointer that implements `AsyncFn*` is `Sized`,
+// like other built-in impls of an fn pointer, like `Fn*`.
+
+use std::future::Future;
+
+fn foo() -> fn() -> dyn Future