@@ -17,12 +17,6 @@ extern "C" {
1717 fn xgetbv ( x : u32 ) -> i64 ;
1818 #[ link_name = "llvm.x86.xsaveopt" ]
1919 fn xsaveopt ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
20- #[ link_name = "llvm.x86.xsavec" ]
21- fn xsavec ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
22- #[ link_name = "llvm.x86.xsaves" ]
23- fn xsaves ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
24- #[ link_name = "llvm.x86.xrstors" ]
25- fn xrstors ( p : * const u8 , hi : u32 , lo : u32 ) -> ( ) ;
2620}
2721
2822/// Perform a full or partial save of the enabled processor states to memory at
@@ -71,6 +65,12 @@ pub unsafe fn _xsetbv(a: u32, val: u64) -> () {
7165
7266/// Reads the contents of the extended control register `XCR`
7367/// specified in `xcr_no`.
68+ ///
69+ /// This instruction must be executed at privilege level `0` or in real-address
70+ /// mode; otherwise, a general protection exception `#GP(0)` is generated.
71+ /// Specifying a reserved or unimplemented XCR in ECX will also cause a general
72+ /// protection exception. The processor will also generate a general protection
73+ /// exception if software attempts to write to reserved bits in an XCR.
7474#[ inline( always) ]
7575#[ target_feature = "+xsave" ]
7676#[ cfg_attr( test, assert_instr( xgetbv) ) ]
@@ -92,49 +92,6 @@ pub unsafe fn _xsaveopt(mem_addr: *mut u8, save_mask: u64) -> () {
9292 xsaveopt ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
9393}
9494
95- /// Perform a full or partial save of the enabled processor states to memory
96- /// at `mem_addr`.
97- ///
98- /// `xsavec` differs from `xsave` in that it uses compaction and that it may
99- /// use init optimization. State is saved based on bits [62:0] in `save_mask`
100- /// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.
101- #[ inline( always) ]
102- #[ target_feature = "+xsave,+xsavec" ]
103- #[ cfg_attr( test, assert_instr( xsavec) ) ]
104- pub unsafe fn _xsavec ( mem_addr : * mut u8 , save_mask : u64 ) -> ( ) {
105- xsavec ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
106- }
107-
108- /// Perform a full or partial save of the enabled processor states to memory at
109- /// `mem_addr`
110- ///
111- /// `xsaves` differs from xsave in that it can save state components
112- /// corresponding to bits set in `IA32_XSS` `MSR` and that it may use the
113- /// modified optimization. State is saved based on bits [62:0] in `save_mask`
114- /// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.
115- #[ inline( always) ]
116- #[ target_feature = "+xsave,+xsaves" ]
117- #[ cfg_attr( test, assert_instr( xsaves) ) ]
118- pub unsafe fn _xsaves ( mem_addr : * mut u8 , save_mask : u64 ) -> ( ) {
119- xsaves ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
120- }
121-
122- /// Perform a full or partial restore of the enabled processor states using the
123- /// state information stored in memory at `mem_addr`.
124- ///
125- /// `xrstors` differs from `xrstor` in that it can restore state components
126- /// corresponding to bits set in the `IA32_XSS` `MSR`; `xrstors` cannot restore
127- /// from an `xsave` area in which the extended region is in the standard form.
128- /// State is restored based on bits [62:0] in `rs_mask`, `XCR0`, and
129- /// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte
130- /// boundary.
131- #[ inline( always) ]
132- #[ target_feature = "+xsave,+xsaves" ]
133- #[ cfg_attr( test, assert_instr( xrstors) ) ]
134- pub unsafe fn _xrstors ( mem_addr : * const u8 , rs_mask : u64 ) -> ( ) {
135- xrstors ( mem_addr, ( rs_mask >> 32 ) as u32 , rs_mask as u32 ) ;
136- }
137-
13895#[ cfg( test) ]
13996mod tests {
14097 use x86:: i586:: xsave;
@@ -183,8 +140,7 @@ mod tests {
183140 }
184141 }
185142
186- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
187- /*
143+ #[ cfg( not( feature = "intel_sde" ) ) ]
188144 #[ simd_test = "xsave" ]
189145 unsafe fn xsave ( ) {
190146 let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
@@ -196,7 +152,6 @@ mod tests {
196152 xsave:: _xsave ( b. ptr ( ) , m) ;
197153 assert_eq ! ( a, b) ;
198154 }
199- */
200155
201156 #[ simd_test = "xsave" ]
202157 unsafe fn xgetbv_xsetbv ( ) {
@@ -211,8 +166,7 @@ mod tests {
211166 assert_eq ! ( xcr, xcr_cpy) ;
212167 }
213168
214- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
215- /*
169+ #[ cfg( not( feature = "intel_sde" ) ) ]
216170 #[ simd_test = "xsave,xsaveopt" ]
217171 unsafe fn xsaveopt ( ) {
218172 let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
@@ -224,34 +178,4 @@ mod tests {
224178 xsave:: _xsaveopt ( b. ptr ( ) , m) ;
225179 assert_eq ! ( a, b) ;
226180 }
227- */
228-
229- // FIXME: this looks like a bug in Intel's SDE:
230- #[ cfg( not( feature = "intel_sde" ) ) ]
231- #[ simd_test = "xsave,xsavec" ]
232- unsafe fn xsavec ( ) {
233- let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
234- let mut a = XsaveArea :: new ( ) ;
235- let mut b = XsaveArea :: new ( ) ;
236-
237- xsave:: _xsavec ( a. ptr ( ) , m) ;
238- xsave:: _xrstor ( a. ptr ( ) , m) ;
239- xsave:: _xsavec ( b. ptr ( ) , m) ;
240- assert_eq ! ( a, b) ;
241- }
242-
243- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
244- /*
245- #[simd_test = "xsave,xsaves"]
246- unsafe fn xsaves() {
247- let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
248- let mut a = XsaveArea::new();
249- let mut b = XsaveArea::new();
250-
251- xsave::_xsaves(a.ptr(), m);
252- xsave::_xrstors(a.ptr(), m);
253- xsave::_xsaves(b.ptr(), m);
254- assert_eq!(a, b);
255- }
256- */
257181}
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