@@ -17,12 +17,6 @@ extern "C" {
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fn xgetbv ( x : u32 ) -> i64 ;
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#[ link_name = "llvm.x86.xsaveopt" ]
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fn xsaveopt ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
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- #[ link_name = "llvm.x86.xsavec" ]
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- fn xsavec ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
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- #[ link_name = "llvm.x86.xsaves" ]
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- fn xsaves ( p : * mut u8 , hi : u32 , lo : u32 ) -> ( ) ;
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- #[ link_name = "llvm.x86.xrstors" ]
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- fn xrstors ( p : * const u8 , hi : u32 , lo : u32 ) -> ( ) ;
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}
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/// Perform a full or partial save of the enabled processor states to memory at
@@ -71,6 +65,12 @@ pub unsafe fn _xsetbv(a: u32, val: u64) -> () {
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/// Reads the contents of the extended control register `XCR`
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/// specified in `xcr_no`.
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+ ///
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+ /// This instruction must be executed at privilege level `0` or in real-address
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+ /// mode; otherwise, a general protection exception `#GP(0)` is generated.
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+ /// Specifying a reserved or unimplemented XCR in ECX will also cause a general
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+ /// protection exception. The processor will also generate a general protection
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+ /// exception if software attempts to write to reserved bits in an XCR.
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#[ inline( always) ]
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#[ target_feature = "+xsave" ]
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#[ cfg_attr( test, assert_instr( xgetbv) ) ]
@@ -92,49 +92,6 @@ pub unsafe fn _xsaveopt(mem_addr: *mut u8, save_mask: u64) -> () {
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xsaveopt ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
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}
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- /// Perform a full or partial save of the enabled processor states to memory
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- /// at `mem_addr`.
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- ///
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- /// `xsavec` differs from `xsave` in that it uses compaction and that it may
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- /// use init optimization. State is saved based on bits [62:0] in `save_mask`
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- /// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.
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- #[ inline( always) ]
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- #[ target_feature = "+xsave,+xsavec" ]
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- #[ cfg_attr( test, assert_instr( xsavec) ) ]
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- pub unsafe fn _xsavec ( mem_addr : * mut u8 , save_mask : u64 ) -> ( ) {
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- xsavec ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
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- }
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-
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- /// Perform a full or partial save of the enabled processor states to memory at
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- /// `mem_addr`
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- ///
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- /// `xsaves` differs from xsave in that it can save state components
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- /// corresponding to bits set in `IA32_XSS` `MSR` and that it may use the
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- /// modified optimization. State is saved based on bits [62:0] in `save_mask`
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- /// and `XCR0`. `mem_addr` must be aligned on a 64-byte boundary.
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- #[ inline( always) ]
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- #[ target_feature = "+xsave,+xsaves" ]
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- #[ cfg_attr( test, assert_instr( xsaves) ) ]
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- pub unsafe fn _xsaves ( mem_addr : * mut u8 , save_mask : u64 ) -> ( ) {
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- xsaves ( mem_addr, ( save_mask >> 32 ) as u32 , save_mask as u32 ) ;
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- }
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-
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- /// Perform a full or partial restore of the enabled processor states using the
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- /// state information stored in memory at `mem_addr`.
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- ///
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- /// `xrstors` differs from `xrstor` in that it can restore state components
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- /// corresponding to bits set in the `IA32_XSS` `MSR`; `xrstors` cannot restore
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- /// from an `xsave` area in which the extended region is in the standard form.
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- /// State is restored based on bits [62:0] in `rs_mask`, `XCR0`, and
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- /// `mem_addr.HEADER.XSTATE_BV`. `mem_addr` must be aligned on a 64-byte
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- /// boundary.
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- #[ inline( always) ]
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- #[ target_feature = "+xsave,+xsaves" ]
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- #[ cfg_attr( test, assert_instr( xrstors) ) ]
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- pub unsafe fn _xrstors ( mem_addr : * const u8 , rs_mask : u64 ) -> ( ) {
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- xrstors ( mem_addr, ( rs_mask >> 32 ) as u32 , rs_mask as u32 ) ;
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- }
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-
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#[ cfg( test) ]
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mod tests {
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use x86:: i586:: xsave;
@@ -183,8 +140,7 @@ mod tests {
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}
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}
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- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
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- /*
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+ #[ cfg( not( feature = "intel_sde" ) ) ]
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#[ simd_test = "xsave" ]
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unsafe fn xsave ( ) {
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let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
@@ -196,7 +152,6 @@ mod tests {
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xsave:: _xsave ( b. ptr ( ) , m) ;
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assert_eq ! ( a, b) ;
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}
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- */
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#[ simd_test = "xsave" ]
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unsafe fn xgetbv_xsetbv ( ) {
@@ -211,8 +166,7 @@ mod tests {
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assert_eq ! ( xcr, xcr_cpy) ;
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}
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- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
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- /*
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+ #[ cfg( not( feature = "intel_sde" ) ) ]
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#[ simd_test = "xsave,xsaveopt" ]
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unsafe fn xsaveopt ( ) {
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let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
@@ -224,34 +178,4 @@ mod tests {
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xsave:: _xsaveopt ( b. ptr ( ) , m) ;
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assert_eq ! ( a, b) ;
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}
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- */
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-
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- // FIXME: this looks like a bug in Intel's SDE:
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- #[ cfg( not( feature = "intel_sde" ) ) ]
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- #[ simd_test = "xsave,xsavec" ]
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- unsafe fn xsavec ( ) {
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- let m = 0xFFFFFFFFFFFFFFFF_u64 ; //< all registers
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- let mut a = XsaveArea :: new ( ) ;
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- let mut b = XsaveArea :: new ( ) ;
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-
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- xsave:: _xsavec ( a. ptr ( ) , m) ;
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- xsave:: _xrstor ( a. ptr ( ) , m) ;
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- xsave:: _xsavec ( b. ptr ( ) , m) ;
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- assert_eq ! ( a, b) ;
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- }
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-
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- // FIXME: https://github.com/rust-lang-nursery/stdsimd/issues/209
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- /*
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- #[simd_test = "xsave,xsaves"]
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- unsafe fn xsaves() {
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- let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
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- let mut a = XsaveArea::new();
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- let mut b = XsaveArea::new();
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-
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- xsave::_xsaves(a.ptr(), m);
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- xsave::_xrstors(a.ptr(), m);
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- xsave::_xsaves(b.ptr(), m);
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- assert_eq!(a, b);
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- }
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- */
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}
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