Skip to content

Commit 35f71c2

Browse files
Daniel SmithAmanieu
Daniel Smith
authored andcommitted
Fix comparison comments
1 parent 45340c0 commit 35f71c2

File tree

1 file changed

+16
-16
lines changed

1 file changed

+16
-16
lines changed

crates/core_arch/src/x86/avx512f.rs

+16-16
Original file line numberDiff line numberDiff line change
@@ -115,7 +115,7 @@ pub unsafe fn _mm512_mask_cmplt_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
115115
_mm512_cmplt_epu64_mask(a, b) & m
116116
}
117117

118-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
118+
/// Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector.
119119
///
120120
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpgt_epu64)
121121
#[inline]
@@ -125,7 +125,7 @@ pub unsafe fn _mm512_cmpgt_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 {
125125
simd_bitmask::<__m512i, _>(simd_gt(a.as_u64x8(), b.as_u64x8()))
126126
}
127127

128-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
128+
///Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector k
129129
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
130130
///
131131
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpgt_epu64)
@@ -136,7 +136,7 @@ pub unsafe fn _mm512_mask_cmpgt_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
136136
_mm512_cmpgt_epu64_mask(a, b) & m
137137
}
138138

139-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
139+
/// Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector.
140140
///
141141
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmple_epu64)
142142
#[inline]
@@ -146,7 +146,7 @@ pub unsafe fn _mm512_cmple_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 {
146146
_mm512_cmpgt_epu64_mask(b, a)
147147
}
148148

149-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
149+
///Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector k
150150
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
151151
///
152152
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmple_epu64)
@@ -157,7 +157,7 @@ pub unsafe fn _mm512_mask_cmple_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
157157
_mm512_cmpgt_epu64_mask(b, a) & m
158158
}
159159

160-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
160+
/// Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector.
161161
///
162162
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpge_epu64)
163163
#[inline]
@@ -167,7 +167,7 @@ pub unsafe fn _mm512_cmpge_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 {
167167
_mm512_cmplt_epu64_mask(b, a)
168168
}
169169

170-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
170+
///Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector k
171171
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
172172
///
173173
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpge_epu64)
@@ -178,7 +178,7 @@ pub unsafe fn _mm512_mask_cmpge_epu64_mask(m: __mmask8, a: __m512i, b: __m512i)
178178
_mm512_cmplt_epu64_mask(b, a) & m
179179
}
180180

181-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
181+
/// Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector.
182182
///
183183
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpeq_epu64)
184184
#[inline]
@@ -188,7 +188,7 @@ pub unsafe fn _mm512_cmpeq_epu64_mask(a: __m512i, b: __m512i) -> __mmask8 {
188188
simd_bitmask::<__m512i, _>(simd_eq(a.as_u64x8(), b.as_u64x8()))
189189
}
190190

191-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
191+
///Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector k
192192
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
193193
///
194194
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpeq_epu64)
@@ -220,7 +220,7 @@ pub unsafe fn _mm512_mask_cmplt_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
220220
_mm512_cmplt_epi64_mask(a, b) & m
221221
}
222222

223-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
223+
/// Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector.
224224
///
225225
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpgt_epi64)
226226
#[inline]
@@ -230,7 +230,7 @@ pub unsafe fn _mm512_cmpgt_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
230230
simd_bitmask::<__m512i, _>(simd_gt(a.as_i64x8(), b.as_i64x8()))
231231
}
232232

233-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
233+
///Compare packed unsigned 64-bit integers in a and b for greater-than, and store the results in a mask vector k
234234
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
235235
///
236236
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpgt_epi64)
@@ -241,7 +241,7 @@ pub unsafe fn _mm512_mask_cmpgt_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
241241
_mm512_cmpgt_epi64_mask(a, b) & m
242242
}
243243

244-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
244+
/// Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector.
245245
///
246246
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmple_epi64)
247247
#[inline]
@@ -251,7 +251,7 @@ pub unsafe fn _mm512_cmple_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
251251
_mm512_cmpgt_epi64_mask(b, a)
252252
}
253253

254-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
254+
///Compare packed unsigned 64-bit integers in a and b for less-than-or-equal, and store the results in a mask vector k
255255
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
256256
///
257257
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmple_epi64)
@@ -262,7 +262,7 @@ pub unsafe fn _mm512_mask_cmple_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
262262
_mm512_cmpgt_epi64_mask(b, a) & m
263263
}
264264

265-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
265+
/// Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector.
266266
///
267267
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpge_epi64)
268268
#[inline]
@@ -272,7 +272,7 @@ pub unsafe fn _mm512_cmpge_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
272272
_mm512_cmplt_epi64_mask(b, a)
273273
}
274274

275-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
275+
///Compare packed unsigned 64-bit integers in a and b for greater-than-or-equal, and store the results in a mask vector k
276276
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
277277
///
278278
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpge_epi64)
@@ -283,7 +283,7 @@ pub unsafe fn _mm512_mask_cmpge_epi64_mask(m: __mmask8, a: __m512i, b: __m512i)
283283
_mm512_cmplt_epi64_mask(b, a) & m
284284
}
285285

286-
/// Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector.
286+
/// Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector.
287287
///
288288
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062&text=_mm512_cmpeq_epi64)
289289
#[inline]
@@ -293,7 +293,7 @@ pub unsafe fn _mm512_cmpeq_epi64_mask(a: __m512i, b: __m512i) -> __mmask8 {
293293
simd_bitmask::<__m512i, _>(simd_eq(a.as_i64x8(), b.as_i64x8()))
294294
}
295295

296-
///Compare packed unsigned 64-bit integers in a and b for less-than, and store the results in a mask vector k
296+
///Compare packed unsigned 64-bit integers in a and b for equality, and store the results in a mask vector k
297297
/// using zeromask m (elements are zeroed out when the corresponding mask bit is not set).
298298
///
299299
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#expand=727,1063,4909,1062,1062,1063&text=_mm512_mask_cmpeq_epi64)

0 commit comments

Comments
 (0)