@@ -1974,6 +1974,12 @@ ALWAYS_INLINE_RELEASE void CPU::ExecuteInstruction()
19741974 }
19751975
19761976 const VirtualMemoryAddress addr = ReadReg (inst.i .rs ) + inst.i .imm_sext32 ();
1977+ if constexpr (debug)
1978+ {
1979+ Cop0DataBreakpointCheck<MemoryAccessType::Read>(addr);
1980+ MemoryBreakpointCheck<MemoryAccessType::Read>(addr);
1981+ }
1982+
19771983 u32 value;
19781984 if (!ReadMemoryWord (addr, &value))
19791985 return ;
@@ -1997,6 +2003,12 @@ ALWAYS_INLINE_RELEASE void CPU::ExecuteInstruction()
19972003 StallUntilGTEComplete ();
19982004
19992005 const VirtualMemoryAddress addr = ReadReg (inst.i .rs ) + inst.i .imm_sext32 ();
2006+ if constexpr (debug)
2007+ {
2008+ Cop0DataBreakpointCheck<MemoryAccessType::Write>(addr);
2009+ MemoryBreakpointCheck<MemoryAccessType::Write>(addr);
2010+ }
2011+
20002012 const u32 value = GTE::ReadRegister (ZeroExtend32 (static_cast <u8 >(inst.i .rt .GetValue ())));
20012013 WriteMemoryWord (addr, value);
20022014
@@ -2005,16 +2017,46 @@ ALWAYS_INLINE_RELEASE void CPU::ExecuteInstruction()
20052017 }
20062018 break ;
20072019
2008- // swc0/lwc0/ cop1/cop3 are essentially no-ops
2020+ // cop1/cop3 are essentially no-ops
20092021 case InstructionOp::cop1:
20102022 case InstructionOp::cop3:
2023+ {
2024+ }
2025+ break ;
2026+
20112027 case InstructionOp::lwc0:
20122028 case InstructionOp::lwc1:
20132029 case InstructionOp::lwc3:
2030+ {
2031+ // todo: check enable
2032+ // lwc0/1/3 should still perform the memory read, but discard the result
2033+ const VirtualMemoryAddress addr = ReadReg (inst.i .rs ) + inst.i .imm_sext32 ();
2034+ if constexpr (debug)
2035+ {
2036+ Cop0DataBreakpointCheck<MemoryAccessType::Read>(addr);
2037+ MemoryBreakpointCheck<MemoryAccessType::Read>(addr);
2038+ }
2039+
2040+ u32 value;
2041+ ReadMemoryWord (addr, &value);
2042+ }
2043+ break ;
2044+
2045+ break ;
20142046 case InstructionOp::swc0:
20152047 case InstructionOp::swc1:
20162048 case InstructionOp::swc3:
20172049 {
2050+ // todo: check enable
2051+ // lwc0/1/3 should still perform the memory read, but discard the result
2052+ const VirtualMemoryAddress addr = ReadReg (inst.i .rs ) + inst.i .imm_sext32 ();
2053+ if constexpr (debug)
2054+ {
2055+ Cop0DataBreakpointCheck<MemoryAccessType::Write>(addr);
2056+ MemoryBreakpointCheck<MemoryAccessType::Write>(addr);
2057+ }
2058+
2059+ WriteMemoryWord (addr, 0 );
20182060 }
20192061 break ;
20202062
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