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Pesastenzek
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GPU: Fix typo
1 parent 300d158 commit df65879

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2 files changed

+7
-7
lines changed

2 files changed

+7
-7
lines changed

src/core/gpu.cpp

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -442,22 +442,22 @@ void GPU::UpdateDMARequest()
442442
{
443443
case BlitterState::Idle:
444444
m_GPUSTAT.ready_to_send_vram = false;
445-
m_GPUSTAT.ready_to_recieve_dma = (m_fifo.IsEmpty() || m_fifo.GetSize() < m_command_total_words);
445+
m_GPUSTAT.ready_to_receive_dma = (m_fifo.IsEmpty() || m_fifo.GetSize() < m_command_total_words);
446446
break;
447447

448448
case BlitterState::WritingVRAM:
449449
m_GPUSTAT.ready_to_send_vram = false;
450-
m_GPUSTAT.ready_to_recieve_dma = (m_fifo.GetSize() < m_fifo_size);
450+
m_GPUSTAT.ready_to_receive_dma = (m_fifo.GetSize() < m_fifo_size);
451451
break;
452452

453453
case BlitterState::ReadingVRAM:
454454
m_GPUSTAT.ready_to_send_vram = true;
455-
m_GPUSTAT.ready_to_recieve_dma = false;
455+
m_GPUSTAT.ready_to_receive_dma = false;
456456
break;
457457

458458
case BlitterState::DrawingPolyLine:
459459
m_GPUSTAT.ready_to_send_vram = false;
460-
m_GPUSTAT.ready_to_recieve_dma = (m_fifo.GetSize() < m_fifo_size);
460+
m_GPUSTAT.ready_to_receive_dma = (m_fifo.GetSize() < m_fifo_size);
461461
break;
462462

463463
default:
@@ -473,11 +473,11 @@ void GPU::UpdateDMARequest()
473473
break;
474474

475475
case GPUDMADirection::FIFO:
476-
dma_request = m_GPUSTAT.ready_to_recieve_dma;
476+
dma_request = m_GPUSTAT.ready_to_receive_dma;
477477
break;
478478

479479
case GPUDMADirection::CPUtoGP0:
480-
dma_request = m_GPUSTAT.ready_to_recieve_dma;
480+
dma_request = m_GPUSTAT.ready_to_receive_dma;
481481
break;
482482

483483
case GPUDMADirection::GPUREADtoCPU:

src/core/gpu_types.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,7 @@ union GPUSTAT
205205
BitField<u32, bool, 25, 1> dma_data_request;
206206
BitField<u32, bool, 26, 1> gpu_idle;
207207
BitField<u32, bool, 27, 1> ready_to_send_vram;
208-
BitField<u32, bool, 28, 1> ready_to_recieve_dma;
208+
BitField<u32, bool, 28, 1> ready_to_receive_dma;
209209
BitField<u32, GPUDMADirection, 29, 2> dma_direction;
210210
BitField<u32, bool, 31, 1> display_line_lsb;
211211

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