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Add test for br_gh1592 and EF var to wire result
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‎ivtest/ivltests/br_gh1592.v‎

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module t;
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wire [3:0] w;
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assign w[4:1] = 4'b1010;
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initial begin
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#1;
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if (w !== 4'b010z) $display("FAILED: expected 4'b010z, got '%b'", w);
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else $display("PASSED");
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end
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endmodule

‎ivtest/regress-vlg.list‎

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br_gh1497a normal,-gspecify ivltests gold=br_gh1497.gold
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br_gh1497b normal,-gspecify ivltests gold=br_gh1497.gold
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br_gh1537 normal ivltests
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br_gh1592 normal ivltests
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br_ml20150315 normal ivltests gold=br_ml_20150315.gold
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br_ml20150321 CE ivltests
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br_mw20171108 normal ivltests
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{
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"type" : "normal",
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"source" : "struct_packed_write_read.v",
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"iverilog-args" : [ "-g2009" ]
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"iverilog-args" : [ "-g2009" ],
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"vlog95" : {
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"__comment" : "variables are cast to wires",
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"type" : "EF"
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}
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}

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