From 8971fccf7f6fb8d933b87a5aa5e80bbf1483de9d Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Thu, 17 Apr 2025 10:41:57 +0200
Subject: [PATCH 1/8] added l412rb_p

---
 README.md                                     |   3 +-
 boards.txt                                    |  76 ++++----
 .../STM32L4xx/L412RB(I-T)xP/CMakeLists.txt    |   1 +
 variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld  | 175 ++++++++++++++++++
 .../L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp | 162 ++++++++++++++++
 .../L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h   | 155 ++++++++++++++++
 6 files changed, 528 insertions(+), 44 deletions(-)
 create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
 create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp
 create mode 100644 variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h

diff --git a/README.md b/README.md
index f8b7b0bd73..a66783ebb9 100644
--- a/README.md
+++ b/README.md
@@ -148,6 +148,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32L053R8 | [Nucleo L053R8](http://www.st.com/en/evaluation-tools/nucleo-l053r8.html) | *0.1.0* |  |
 | :green_heart:  | STM32L073RZ | [Nucleo L073RZ](http://www.st.com/en/evaluation-tools/nucleo-l073rz.html) | *1.4.0* |  |
 | :green_heart:  | STM32L152RE | [Nucleo L152RE](http://www.st.com/en/evaluation-tools/nucleo-l152re.html) | *1.0.0* |  |
+| :green_heart:  | STM32L412RB-P | [Nucleo L412RC-P](https://www.st.com/en/evaluation-tools/nucleo-l412rb-p.html) | *2.10.1* |  |
 | :green_heart:  | STM32L433RC-P | [Nucleo L433RC-P](https://www.st.com/en/evaluation-tools/nucleo-l433rc-p.html) | *1.9.0* |  |
 | :green_heart:  | STM32L452RE | [Nucleo L452RE](http://www.st.com/en/evaluation-tools/nucleo-l452re.html) | *1.5.0* |  |
 | :green_heart:  | STM32L452RE-P | [Nucleo L452RE-P](http://www.st.com/en/evaluation-tools/nucleo-l452re-p.html) | *1.8.0* |  |
@@ -704,7 +705,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | Status | Device(s) | Name | Release | Notes |
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart:  | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* |  |
-| :green_heart:  | STM32L431CB<br>STM32L431CC | Generic Board | *2.8.1* |  |
+| :green_heart:  | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | *2.10.1* |  |
 | :green_heart:  | STM32L431RB<br>STM32L431RC | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* |  |
diff --git a/boards.txt b/boards.txt
index aaebef7be9..da76798ee3 100644
--- a/boards.txt
+++ b/boards.txt
@@ -758,6 +758,21 @@ Nucleo_64.menu.pnum.NUCLEO_L152RE.build.variant=STM32L1xx/L151RET_L152RET_L162RE
 Nucleo_64.menu.pnum.NUCLEO_L152RE.openocd.target=stm32l1
 Nucleo_64.menu.pnum.NUCLEO_L152RE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L1xx/STM32L152.svd
 
+# NUCLEO_L412RB_P board
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P=Nucleo L412RB-P
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.node=NODE_L412RB
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.upload.maximum_size=131072
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.upload.maximum_data_size=40960
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.mcu=cortex-m4
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.fpu=-mfpu=fpv4-sp-d16
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.float-abi=-mfloat-abi=hard
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.board=NUCLEO_L412RB_P
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.series=STM32L4xx
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.product_line=STM32L412xx
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.build.variant=STM32L4xx/L412RB(I-T)xP
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.openocd.target=stm32l4x
+Nucleo_64.menu.pnum.NUCLEO_L412RB_P.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd
+
 # NUCLEO_L433RC_P board
 Nucleo_64.menu.pnum.NUCLEO_L433RC_P=Nucleo L433RC-P
 Nucleo_64.menu.pnum.NUCLEO_L433RC_P.node=NODE_L433RC
@@ -1423,22 +1438,6 @@ Disco.menu.pnum.STM32H747I_DISCO.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 Disco.menu.pnum.STM32H747I_DISCO.openocd.target=stm32h7x
 Disco.menu.pnum.STM32H747I_DISCO.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H747_CM7.svd
 
-# STM32L562E-DK
-Disco.menu.pnum.STM32L562E_DK=STM32L562E-DK
-Disco.menu.pnum.STM32L562E_DK.node=DIS_L562QE
-Disco.menu.pnum.STM32L562E_DK.upload.maximum_size=524288
-Disco.menu.pnum.STM32L562E_DK.upload.maximum_data_size=196608
-Disco.menu.pnum.STM32L562E_DK.build.mcu=cortex-m33
-Disco.menu.pnum.STM32L562E_DK.build.fpu=-mfpu=fpv4-sp-d16
-Disco.menu.pnum.STM32L562E_DK.build.float-abi=-mfloat-abi=hard
-Disco.menu.pnum.STM32L562E_DK.build.board=STM32L562E_DK
-Disco.menu.pnum.STM32L562E_DK.build.series=STM32L5xx
-Disco.menu.pnum.STM32L562E_DK.build.product_line=STM32L562xx
-Disco.menu.pnum.STM32L562E_DK.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
-Disco.menu.pnum.STM32L562E_DK.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
-Disco.menu.pnum.STM32L562E_DK.openocd.target=stm32l5x
-Disco.menu.pnum.STM32L562E_DK.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd
-
 # STM32WB5MM-DK board
 Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
 Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"
@@ -11471,6 +11470,24 @@ GenL4.menu.pnum.GENERIC_L412KBUX.build.product_line=STM32L412xx
 GenL4.menu.pnum.GENERIC_L412KBUX.build.variant=STM32L4xx/L412K(8-B)(T-U)_L422KB(T-U)
 GenL4.menu.pnum.GENERIC_L412KBUX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd
 
+# Generic L412RBIxP
+GenL4.menu.pnum.GENERIC_L412RBIXP=Generic L412RBIxP
+GenL4.menu.pnum.GENERIC_L412RBIXP.upload.maximum_size=131072
+GenL4.menu.pnum.GENERIC_L412RBIXP.upload.maximum_data_size=40960
+GenL4.menu.pnum.GENERIC_L412RBIXP.build.board=GENERIC_L412RBIXP
+GenL4.menu.pnum.GENERIC_L412RBIXP.build.product_line=STM32L412xx
+GenL4.menu.pnum.GENERIC_L412RBIXP.build.variant=STM32L4xx/L412RB(I-T)xP
+GenL4.menu.pnum.GENERIC_L412RBIXP.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd
+
+# Generic L412RBTxP
+GenL4.menu.pnum.GENERIC_L412RBTXP=Generic L412RBTxP
+GenL4.menu.pnum.GENERIC_L412RBTXP.upload.maximum_size=131072
+GenL4.menu.pnum.GENERIC_L412RBTXP.upload.maximum_data_size=40960
+GenL4.menu.pnum.GENERIC_L412RBTXP.build.board=GENERIC_L412RBTXP
+GenL4.menu.pnum.GENERIC_L412RBTXP.build.product_line=STM32L412xx
+GenL4.menu.pnum.GENERIC_L412RBTXP.build.variant=STM32L4xx/L412RB(I-T)xP
+GenL4.menu.pnum.GENERIC_L412RBTXP.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L4xx/STM32L412.svd
+
 # Generic L422KBTx
 GenL4.menu.pnum.GENERIC_L422KBTX=Generic L422KBTx
 GenL4.menu.pnum.GENERIC_L422KBTX.upload.maximum_size=131072
@@ -12242,24 +12259,6 @@ GenL5.openocd.target=stm32l5x
 GenL5.vid.0=0x0483
 GenL5.pid.0=0x5740
 
-# Generic L552QCIxQ
-GenL5.menu.pnum.GENERIC_L552QCIXQ=Generic L552QCIxQ
-GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_size=262144
-GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_data_size=262144
-GenL5.menu.pnum.GENERIC_L552QCIXQ.build.board=GENERIC_L552QCIXQ
-GenL5.menu.pnum.GENERIC_L552QCIXQ.build.product_line=STM32L552xx
-GenL5.menu.pnum.GENERIC_L552QCIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
-GenL5.menu.pnum.GENERIC_L552QCIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
-
-# Generic L552QEIxQ
-GenL5.menu.pnum.GENERIC_L552QEIXQ=Generic L552QEIxQ
-GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_size=524288
-GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_data_size=262144
-GenL5.menu.pnum.GENERIC_L552QEIXQ.build.board=GENERIC_L552QEIXQ
-GenL5.menu.pnum.GENERIC_L552QEIXQ.build.product_line=STM32L552xx
-GenL5.menu.pnum.GENERIC_L552QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
-GenL5.menu.pnum.GENERIC_L552QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
-
 # Generic L552ZCTxQ
 GenL5.menu.pnum.GENERIC_L552ZCTXQ=Generic L552ZCTxQ
 GenL5.menu.pnum.GENERIC_L552ZCTXQ.upload.maximum_size=262144
@@ -12278,15 +12277,6 @@ GenL5.menu.pnum.GENERIC_L552ZETXQ.build.product_line=STM32L552xx
 GenL5.menu.pnum.GENERIC_L552ZETXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ
 GenL5.menu.pnum.GENERIC_L552ZETXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
 
-# Generic L562QC-EIxQ
-GenL5.menu.pnum.GENERIC_L562QEIXQ=Generic L562QC-EIxQ
-GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_size=524288
-GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_data_size=196608
-GenL5.menu.pnum.GENERIC_L562QEIXQ.build.board=GENERIC_L562QEIXQ
-GenL5.menu.pnum.GENERIC_L562QEIXQ.build.product_line=STM32L562xx
-GenL5.menu.pnum.GENERIC_L562QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
-GenL5.menu.pnum.GENERIC_L562QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd
-
 # Generic L562ZETxQ
 GenL5.menu.pnum.GENERIC_L562ZETXQ=Generic L562ZETxQ
 GenL5.menu.pnum.GENERIC_L562ZETXQ.upload.maximum_size=524288
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt
index 2a4d55b6b1..3eab75f214 100644
--- a/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt
+++ b/variants/STM32L4xx/L412RB(I-T)xP/CMakeLists.txt
@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
   generic_clock.c
   PeripheralPins.c
   variant_generic.cpp
+  variant_NUCLEO_L412RB_P.cpp
 )
 target_link_libraries(variant_bin PUBLIC variant_usage)
 
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
new file mode 100644
index 0000000000..7704bd96d1
--- /dev/null
+++ b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
@@ -0,0 +1,175 @@
+/**
+ ******************************************************************************
+ * @file      LinkerScript.ld
+ * @author    Auto-generated by STM32CubeIDE
+ * @brief     Linker script for STM32L412RBxP Device from STM32L4 series
+ *                      128Kbytes FLASH
+ *                      40Kbytes RAM
+ *
+ *            Set heap size, stack size and stack location according
+ *            to application requirements.
+ *
+ *            Set memory bank area and size if external memory is used
+ ******************************************************************************
+ * @attention
+ *
+ * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+ * All rights reserved.</center></h2>
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ ******************************************************************************
+ */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;	/* required amount of heap  */
+_Min_Stack_Size = 0x400;	/* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = LD_MAX_DATA_SIZE
+  FLASH    (rx)    : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab (READONLY) : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM (READONLY) : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array (READONLY) :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array (READONLY) :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array (READONLY) :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp
new file mode 100644
index 0000000000..9b79190615
--- /dev/null
+++ b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.cpp
@@ -0,0 +1,162 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_NUCLEO_L412RB_P)
+#include "pins_arduino.h"
+
+// Digital PinName array
+const PinName digitalPin[] = {
+  PA_10,
+  PA_9,
+  PA_12,
+  PB_3,
+  PB_5,
+  PA_15,
+  PB_10,
+  PC_7,
+  PB_6,
+  PA_8,
+  PA_11,
+  PB_15,
+  PB_14,
+  PB_13, // LED
+  PB_7,
+  PB_8,
+  // ST Morpho
+  // CN5 Left Side
+  PC_10,
+  PC_12,
+  PB_12,
+  PA_13,
+  PA_14,
+  PC_13, // User Button
+  PC_14,
+  PC_15,
+  PH_0,
+  PH_1,
+  PB_4,
+  PB_9,
+  // CN5 Right Side
+  PC_11,
+  // CN6 Left Side
+  PC_9,
+  // CN6 Right Side
+  PC_8,
+  PC_6,
+  PB_0,
+  PB_11,
+  PB_2,
+  PB_1,
+  PA_7,
+  PA_6,
+  PA_5,
+  PA_4,
+  PC_4,
+  PA_3,  // STLink Rx
+  PA_2,  // STLink Tx
+  PA_0,
+  PA_1,
+  PC_3,
+  PC_2,
+  PC_1,
+  PC_0,
+  PH_3
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  43, //A0
+  44, //A1
+  45, //A2
+  46, //A3
+  47, //A4
+  48, //A5
+  32, //A6
+  35, //A7
+  36, //A8
+  37, //A9
+  38, //A10
+  39, //A11
+  40  //A12
+};
+
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+/**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+
+  /* Configure LSE Drive Capability */
+  HAL_PWR_EnableBkUpAccess();
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+  /*
+   * Initializes the RCC Oscillators according to the specified parameters
+   * in the RCC_OscInitTypeDef structure.
+   */
+  /* MSI is enabled after System reset, activate PLL with MSI as source */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_MSI;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.LSEState = RCC_LSE_ON;
+  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
+  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
+  RCC_OscInitStruct.PLL.PLLM = 1;
+  RCC_OscInitStruct.PLL.PLLN = 40;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
+     clocks dividers */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
+    Error_Handler();
+  }
+  /* Configure the main internal regulator output voltage */
+  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK) {
+    Error_Handler();
+  }
+  /* Enable MSI Auto calibration */
+  HAL_RCCEx_EnableMSIPLLMode();
+}
+
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* ARDUINO_NUCLEO_L412RB_P */
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h
new file mode 100644
index 0000000000..9454fcf5bb
--- /dev/null
+++ b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h
@@ -0,0 +1,155 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2021, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ *        Pins
+ *----------------------------------------------------------------------------*/
+
+#define PA10                    0 // SB33 ON / SB32 OFF
+#define PA9                     1 // SB35 ON / SB34 OFF
+#define PA12                    2
+#define PB3                     3
+#define PB5                     4
+#define PA15                    5
+#define PB10                    6
+#define PC7                     7
+#define PB6                     8
+#define PA8                     9
+#define PA11                    10
+#define PB15                    11
+#define PB14                    12
+#define PB13                    13 // LED
+#define PB7                     14
+#define PB8                     15
+// ST Morpho
+// CN5 Left Side
+#define PC10                    16
+#define PC12                    17
+#define PB12                    18
+#define PA13                    19
+#define PA14                    20
+#define PC13                    21 // User Button
+#define PC14                    22
+#define PC15                    23
+#define PH0                     24
+#define PH1                     25
+#define PB4                     26
+#define PB9                     27
+// CN5 Right Side
+#define PC11                    28
+// CN6 Left Side
+#define PC9                     29
+// CN6 Right Side
+#define PC8                     30
+#define PC6                     31
+#define PB0                     PIN_A6
+#define PB11                    33
+#define PB2                     34
+#define PB1                     PIN_A7
+#define PA7                     PIN_A8
+#define PA6                     PIN_A9
+#define PA5                     PIN_A10
+#define PA4                     PIN_A11
+#define PC4                     PIN_A12
+#define PA3                     41 // STLink Rx
+#define PA2                     42 // STLink Tx
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PC3                     PIN_A2
+#define PC2                     PIN_A3
+#define PC1                     PIN_A4
+#define PC0                     PIN_A5
+#define PH3                     49
+
+// Alternate pins number
+#define PA1_ALT1                (PA1  | ALT1)
+#define PA2_ALT1                (PA2  | ALT1)
+#define PA3_ALT1                (PA3  | ALT1)
+#define PA4_ALT1                (PA4  | ALT1)
+#define PA6_ALT1                (PA6  | ALT1)
+#define PA15_ALT1               (PA15 | ALT1)
+#define PB1_ALT1                (PB1  | ALT1)
+#define PB3_ALT1                (PB3  | ALT1)
+#define PB4_ALT1                (PB4  | ALT1)
+#define PB5_ALT1                (PB5  | ALT1)
+#define PB13_ALT1               (PB13 | ALT1)
+#define PB14_ALT1               (PB14 | ALT1)
+#define PB15_ALT1               (PB15 | ALT1)
+
+#define NUM_DIGITAL_PINS        50
+#define NUM_ANALOG_INPUTS       13
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+  #define LED_BUILTIN             PB13
+#endif
+#ifndef LED_GREEN
+  #define LED_GREEN               LED_BUILTIN
+#endif
+
+// On-board user button
+#ifndef USER_BTN
+  #define USER_BTN                PC13
+#endif
+
+// Timer Definitions (optional)
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+  #define TIMER_TONE              TIM6
+#endif
+#ifndef TIMER_SERVO
+  #define TIMER_SERVO             TIM7
+#endif
+
+// UART Definitions
+// Define here Serial instance number to map on Serial generic name
+#define SERIAL_UART_INSTANCE    101
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+  #define PIN_SERIAL_RX           PA3
+#endif
+#ifndef PIN_SERIAL_TX
+  #define PIN_SERIAL_TX           PA2
+#endif
+
+// Enable QSPI
+#if !defined(HAL_QSPI_MODULE_DISABLED)
+  #define HAL_QSPI_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #define SERIAL_PORT_MONITOR     Serial
+  #define SERIAL_PORT_HARDWARE    Serial
+#endif

From bd7fd1be0c8618fc1b6852d428ccf737ccc23967 Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Thu, 17 Apr 2025 11:26:03 +0200
Subject: [PATCH 2/8] forgotten update

---
 boards.txt | 45 ++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 1 deletion(-)

diff --git a/boards.txt b/boards.txt
index da76798ee3..b848f436e0 100644
--- a/boards.txt
+++ b/boards.txt
@@ -1438,6 +1438,22 @@ Disco.menu.pnum.STM32H747I_DISCO.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 Disco.menu.pnum.STM32H747I_DISCO.openocd.target=stm32h7x
 Disco.menu.pnum.STM32H747I_DISCO.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32H7xx/STM32H747_CM7.svd
 
+# STM32L562E-DK
+Disco.menu.pnum.STM32L562E_DK=STM32L562E-DK
+Disco.menu.pnum.STM32L562E_DK.node=DIS_L562QE
+Disco.menu.pnum.STM32L562E_DK.upload.maximum_size=524288
+Disco.menu.pnum.STM32L562E_DK.upload.maximum_data_size=196608
+Disco.menu.pnum.STM32L562E_DK.build.mcu=cortex-m33
+Disco.menu.pnum.STM32L562E_DK.build.fpu=-mfpu=fpv4-sp-d16
+Disco.menu.pnum.STM32L562E_DK.build.float-abi=-mfloat-abi=hard
+Disco.menu.pnum.STM32L562E_DK.build.board=STM32L562E_DK
+Disco.menu.pnum.STM32L562E_DK.build.series=STM32L5xx
+Disco.menu.pnum.STM32L562E_DK.build.product_line=STM32L562xx
+Disco.menu.pnum.STM32L562E_DK.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
+Disco.menu.pnum.STM32L562E_DK.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
+Disco.menu.pnum.STM32L562E_DK.openocd.target=stm32l5x
+Disco.menu.pnum.STM32L562E_DK.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd
+
 # STM32WB5MM-DK board
 Disco.menu.pnum.STM32WB5MM_DK=STM32WB5MM-DK
 Disco.menu.pnum.STM32WB5MM_DK.node="DIS_WB5MMG"
@@ -12259,6 +12275,24 @@ GenL5.openocd.target=stm32l5x
 GenL5.vid.0=0x0483
 GenL5.pid.0=0x5740
 
+# Generic L552QCIxQ
+GenL5.menu.pnum.GENERIC_L552QCIXQ=Generic L552QCIxQ
+GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_size=262144
+GenL5.menu.pnum.GENERIC_L552QCIXQ.upload.maximum_data_size=262144
+GenL5.menu.pnum.GENERIC_L552QCIXQ.build.board=GENERIC_L552QCIXQ
+GenL5.menu.pnum.GENERIC_L552QCIXQ.build.product_line=STM32L552xx
+GenL5.menu.pnum.GENERIC_L552QCIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
+GenL5.menu.pnum.GENERIC_L552QCIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
+
+# Generic L552QEIxQ
+GenL5.menu.pnum.GENERIC_L552QEIXQ=Generic L552QEIxQ
+GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_size=524288
+GenL5.menu.pnum.GENERIC_L552QEIXQ.upload.maximum_data_size=262144
+GenL5.menu.pnum.GENERIC_L552QEIXQ.build.board=GENERIC_L552QEIXQ
+GenL5.menu.pnum.GENERIC_L552QEIXQ.build.product_line=STM32L552xx
+GenL5.menu.pnum.GENERIC_L552QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
+GenL5.menu.pnum.GENERIC_L552QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
+
 # Generic L552ZCTxQ
 GenL5.menu.pnum.GENERIC_L552ZCTXQ=Generic L552ZCTxQ
 GenL5.menu.pnum.GENERIC_L552ZCTXQ.upload.maximum_size=262144
@@ -12277,6 +12311,15 @@ GenL5.menu.pnum.GENERIC_L552ZETXQ.build.product_line=STM32L552xx
 GenL5.menu.pnum.GENERIC_L552ZETXQ.build.variant=STM32L5xx/L552Z(C-E)TxQ_L562ZETxQ
 GenL5.menu.pnum.GENERIC_L552ZETXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L552.svd
 
+# Generic L562QC-EIxQ
+GenL5.menu.pnum.GENERIC_L562QEIXQ=Generic L562QC-EIxQ
+GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_size=524288
+GenL5.menu.pnum.GENERIC_L562QEIXQ.upload.maximum_data_size=196608
+GenL5.menu.pnum.GENERIC_L562QEIXQ.build.board=GENERIC_L562QEIXQ
+GenL5.menu.pnum.GENERIC_L562QEIXQ.build.product_line=STM32L562xx
+GenL5.menu.pnum.GENERIC_L562QEIXQ.build.variant=STM32L5xx/L552Q(C-E)IxQ_L562QEIxQ
+GenL5.menu.pnum.GENERIC_L562QEIXQ.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32L5xx/STM32L562.svd
+
 # Generic L562ZETxQ
 GenL5.menu.pnum.GENERIC_L562ZETXQ=Generic L562ZETxQ
 GenL5.menu.pnum.GENERIC_L562ZETXQ.upload.maximum_size=524288
@@ -16373,4 +16416,4 @@ STeaMi.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
 STeaMi.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
 STeaMi.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
 STeaMi.menu.rtlib.full=Newlib Standard
-STeaMi.menu.rtlib.full.build.flags.ldspecs=
+STeaMi.menu.rtlib.full.build.flags.ldspecs=
\ No newline at end of file

From 23a53fd4762ad63f0702dba51e4b155c1523ac9a Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Thu, 17 Apr 2025 11:42:42 +0200
Subject: [PATCH 3/8] update the variants LD script

---
 README.md                                    |   4 +-
 variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld | 173 +++++++++++--------
 2 files changed, 105 insertions(+), 72 deletions(-)

diff --git a/README.md b/README.md
index a66783ebb9..91ff5a83d4 100644
--- a/README.md
+++ b/README.md
@@ -148,7 +148,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32L053R8 | [Nucleo L053R8](http://www.st.com/en/evaluation-tools/nucleo-l053r8.html) | *0.1.0* |  |
 | :green_heart:  | STM32L073RZ | [Nucleo L073RZ](http://www.st.com/en/evaluation-tools/nucleo-l073rz.html) | *1.4.0* |  |
 | :green_heart:  | STM32L152RE | [Nucleo L152RE](http://www.st.com/en/evaluation-tools/nucleo-l152re.html) | *1.0.0* |  |
-| :green_heart:  | STM32L412RB-P | [Nucleo L412RC-P](https://www.st.com/en/evaluation-tools/nucleo-l412rb-p.html) | *2.10.1* |  |
+| :yellow_heart:  | STM32L412RB-P | [Nucleo L412RC-P](https://www.st.com/en/evaluation-tools/nucleo-l412rb-p.html) | **2.11.0** |  |
 | :green_heart:  | STM32L433RC-P | [Nucleo L433RC-P](https://www.st.com/en/evaluation-tools/nucleo-l433rc-p.html) | *1.9.0* |  |
 | :green_heart:  | STM32L452RE | [Nucleo L452RE](http://www.st.com/en/evaluation-tools/nucleo-l452re.html) | *1.5.0* |  |
 | :green_heart:  | STM32L452RE-P | [Nucleo L452RE-P](http://www.st.com/en/evaluation-tools/nucleo-l452re-p.html) | *1.8.0* |  |
@@ -705,7 +705,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | Status | Device(s) | Name | Release | Notes |
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart:  | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* |  |
-| :green_heart:  | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | *2.10.1* |  |
+| :yellow_heart:  | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | **2.11.0** |  |
 | :green_heart:  | STM32L431RB<br>STM32L431RC | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* |  |
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
index 7704bd96d1..9a2f92934b 100644
--- a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
+++ b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
@@ -1,60 +1,85 @@
-/**
- ******************************************************************************
- * @file      LinkerScript.ld
- * @author    Auto-generated by STM32CubeIDE
- * @brief     Linker script for STM32L412RBxP Device from STM32L4 series
- *                      128Kbytes FLASH
- *                      40Kbytes RAM
- *
- *            Set heap size, stack size and stack location according
- *            to application requirements.
- *
- *            Set memory bank area and size if external memory is used
- ******************************************************************************
- * @attention
- *
- * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
- * All rights reserved.</center></h2>
- *
- * This software component is licensed by ST under BSD 3-Clause license,
- * the "License"; You may not use this file except in compliance with the
- * License. You may obtain a copy of the License at:
- *                        opensource.org/licenses/BSD-3-Clause
- *
- ******************************************************************************
- */
+/*
+******************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Author		: STM32CubeMX
+**
+**  Abstract    : Linker script for STM32L412RBTxP series
+**                128Kbytes FLASH and 40Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**  Distribution: The file is distributed “as is,” without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2025 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
 
 /* Entry Point */
 ENTRY(Reset_Handler)
 
 /* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);	/* end of "RAM" Ram type memory */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
 
-_Min_Heap_Size = 0x200;	/* required amount of heap  */
-_Min_Stack_Size = 0x400;	/* required amount of stack */
-
-/* Memories definition */
+/* Specify the memory areas */
 MEMORY
 {
-  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = LD_MAX_DATA_SIZE
-  FLASH    (rx)    : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 32K
+RAM2 (xrw)      : ORIGIN = 0x10000000, LENGTH = 8K
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 128K
 }
 
-/* Sections */
+/* Define output sections */
 SECTIONS
 {
-  /* The startup code into "FLASH" Rom type memory */
+  /* The startup code goes first into FLASH */
   .isr_vector :
   {
-    . = ALIGN(4);
+    . = ALIGN(8);
     KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
+    . = ALIGN(8);
   } >FLASH
 
-  /* The program code and other data into "FLASH" Rom type memory */
+  /* The program code and other data goes into FLASH */
   .text :
   {
-    . = ALIGN(4);
+    . = ALIGN(8);
     *(.text)           /* .text sections (code) */
     *(.text*)          /* .text* sections (code) */
     *(.glue_7)         /* glue arm to thumb code */
@@ -64,83 +89,88 @@ SECTIONS
     KEEP (*(.init))
     KEEP (*(.fini))
 
-    . = ALIGN(4);
+    . = ALIGN(8);
     _etext = .;        /* define a global symbols at end of code */
   } >FLASH
 
-  /* Constant data into "FLASH" Rom type memory */
+  /* Constant data goes into FLASH */
   .rodata :
   {
-    . = ALIGN(4);
+    . = ALIGN(8);
     *(.rodata)         /* .rodata sections (constants, strings, etc.) */
     *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
+    . = ALIGN(8);
   } >FLASH
 
-  .ARM.extab (READONLY) : {
-    . = ALIGN(4);
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    . = ALIGN(4);
+  .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  { 
+  . = ALIGN(8);
+  *(.ARM.extab* .gnu.linkonce.armextab.*)
+  . = ALIGN(8);
   } >FLASH
 
-  .ARM (READONLY) : {
-    . = ALIGN(4);
+  .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+	. = ALIGN(8);
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
-    . = ALIGN(4);
+	. = ALIGN(8);
   } >FLASH
 
-  .preinit_array (READONLY) :
+  .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
-    . = ALIGN(4);
+	. = ALIGN(8);
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array*))
     PROVIDE_HIDDEN (__preinit_array_end = .);
-    . = ALIGN(4);
+	. = ALIGN(8);
   } >FLASH
-
-  .init_array (READONLY) :
+  
+  .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
   {
-    . = ALIGN(4);
+	. = ALIGN(8);
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array*))
     PROVIDE_HIDDEN (__init_array_end = .);
-    . = ALIGN(4);
+	. = ALIGN(8);
   } >FLASH
 
-  .fini_array (READONLY) :
+  .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+
   {
-    . = ALIGN(4);
+	. = ALIGN(8);
     PROVIDE_HIDDEN (__fini_array_start = .);
     KEEP (*(SORT(.fini_array.*)))
     KEEP (*(.fini_array*))
     PROVIDE_HIDDEN (__fini_array_end = .);
-    . = ALIGN(4);
+	. = ALIGN(8);
   } >FLASH
 
-  /* Used by the startup to initialize data */
+  /* used by the startup to initialize data */
   _sidata = LOADADDR(.data);
 
-  /* Initialized data sections into "RAM" Ram type memory */
-  .data :
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
   {
-    . = ALIGN(4);
+    . = ALIGN(8);
     _sdata = .;        /* create a global symbol at data start */
     *(.data)           /* .data sections */
     *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
 
-    . = ALIGN(4);
+    . = ALIGN(8);
     _edata = .;        /* define a global symbol at data end */
-
   } >RAM AT> FLASH
 
-  /* Uninitialized data section into "RAM" Ram type memory */
+  
+  /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss section */
+    /* This is used by the startup in order to initialize the .bss secion */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
@@ -152,7 +182,7 @@ SECTIONS
     __bss_end__ = _ebss;
   } >RAM
 
-  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  /* User_heap_stack section, used to check that there is enough RAM left */
   ._user_heap_stack :
   {
     . = ALIGN(8);
@@ -163,7 +193,9 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  /* Remove information from the compiler libraries */
+  
+
+  /* Remove information from the standard libraries */
   /DISCARD/ :
   {
     libc.a ( * )
@@ -171,5 +203,6 @@ SECTIONS
     libgcc.a ( * )
   }
 
-  .ARM.attributes 0 : { *(.ARM.attributes) }
 }
+
+

From d79462344bfcf003e459ee1548659250b3afd816 Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Thu, 17 Apr 2025 11:45:33 +0200
Subject: [PATCH 4/8] readme typo

---
 README.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/README.md b/README.md
index 91ff5a83d4..da6fab6b69 100644
--- a/README.md
+++ b/README.md
@@ -706,6 +706,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart:  | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* |  |
 | :yellow_heart:  | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | **2.11.0** |  |
+| :green_heart: | STM32L431CB<br>STM32L431CC | Generic Board | *2.8.1* | |
 | :green_heart:  | STM32L431RB<br>STM32L431RC | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* |  |

From a96f3571ec4b1096774bbb000ff5b56f6dddb0af Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Tue, 22 Apr 2025 09:10:28 +0200
Subject: [PATCH 5/8] readme update

---
 README.md | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index da6fab6b69..14d0ccdc51 100644
--- a/README.md
+++ b/README.md
@@ -705,8 +705,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | Status | Device(s) | Name | Release | Notes |
 | :----: | :-------: | ---- | :-----: | :---- |
 | :green_heart:  | STM32L412K8<br>STM32L412KB<br>STM32L422KB | Generic Board | *2.0.0* |  |
-| :yellow_heart:  | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | **2.11.0** |  |
-| :green_heart: | STM32L431CB<br>STM32L431CC | Generic Board | *2.8.1* | |
+| :yellow_heart: | STM32L412RBIxP<br>STM32L412RBTxP | Generic Board | **2.11.0** |  |
+| :green_heart:  | STM32L431CB<br>STM32L431CC | Generic Board | *2.8.1* |  |
 | :green_heart:  | STM32L431RB<br>STM32L431RC | Generic Board | *2.3.0* |  |
 | :green_heart:  | STM32L432KB<br>STM32L432KC<br>STM32L442KC | Generic Board | *2.0.0* |  |
 | :green_heart:  | STM32L433CBT<br>STM32L433CCT | Generic Board | *2.1.0* |  |

From 10e198eab75c71b003393fa3fab7f63252497caa Mon Sep 17 00:00:00 2001
From: Antun Skuric <36178713+askuric@users.noreply.github.com>
Date: Tue, 22 Apr 2025 09:29:03 +0200
Subject: [PATCH 6/8] Apply suggestions from code review

Co-authored-by: Frederic Pillon <frederic.pillon@st.com>
Signed-off-by: Antun Skuric <36178713+askuric@users.noreply.github.com>
---
 variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld               | 6 +++---
 variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
index 9a2f92934b..9eb56d5d17 100644
--- a/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
+++ b/variants/STM32L4xx/L412RB(I-T)xP/ldscript.ld
@@ -60,9 +60,9 @@ _Min_Stack_Size = 0x400; /* required amount of stack */
 /* Specify the memory areas */
 MEMORY
 {
-RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 32K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
 RAM2 (xrw)      : ORIGIN = 0x10000000, LENGTH = 8K
-FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 128K
+FLASH (rx)      : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
 }
 
 /* Define output sections */
@@ -170,7 +170,7 @@ SECTIONS
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h
index 9454fcf5bb..a3bb945b4a 100644
--- a/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h
+++ b/variants/STM32L4xx/L412RB(I-T)xP/variant_NUCLEO_L412RB_P.h
@@ -109,7 +109,7 @@
   #define TIMER_TONE              TIM6
 #endif
 #ifndef TIMER_SERVO
-  #define TIMER_SERVO             TIM7
+  #define TIMER_SERVO             TIM16
 #endif
 
 // UART Definitions

From 235ed67af259e103ff8bcae937f94759b2b79a26 Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Tue, 22 Apr 2025 09:32:40 +0200
Subject: [PATCH 7/8] boardes.txt removed newline at the end

---
 boards.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boards.txt b/boards.txt
index b848f436e0..dd8bf501aa 100644
--- a/boards.txt
+++ b/boards.txt
@@ -16416,4 +16416,4 @@ STeaMi.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
 STeaMi.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
 STeaMi.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
 STeaMi.menu.rtlib.full=Newlib Standard
-STeaMi.menu.rtlib.full.build.flags.ldspecs=
\ No newline at end of file
+STeaMi.menu.rtlib.full.build.flags.ldspecs= 

From a2beebaa20698dfb3a47c089157d4b14fea18789 Mon Sep 17 00:00:00 2001
From: gospar <antun.skuric@outlook.com>
Date: Tue, 22 Apr 2025 09:33:09 +0200
Subject: [PATCH 8/8] boardes.txt removed newline at the end

---
 boards.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/boards.txt b/boards.txt
index dd8bf501aa..4f64d3f800 100644
--- a/boards.txt
+++ b/boards.txt
@@ -16416,4 +16416,4 @@ STeaMi.menu.rtlib.nanofs.build.flags.ldspecs=--specs=nano.specs -u _scanf_float
 STeaMi.menu.rtlib.nanofps=Newlib Nano + Float Printf/Scanf
 STeaMi.menu.rtlib.nanofps.build.flags.ldspecs=--specs=nano.specs -u _printf_float -u _scanf_float
 STeaMi.menu.rtlib.full=Newlib Standard
-STeaMi.menu.rtlib.full.build.flags.ldspecs= 
+STeaMi.menu.rtlib.full.build.flags.ldspecs=