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decode.c: fix clang-format-20 violations
1 parent 650012a commit 9c2fd3d

1 file changed

Lines changed: 106 additions & 69 deletions

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‎src/decode.c‎

Lines changed: 106 additions & 69 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,8 @@ static inline uint32_t decode_rs2(const uint32_t insn)
2929
return (insn >> 20) & 0x1f;
3030
}
3131

32-
/* decode funct3 field: insn[14:12] — only used by F-extension (rounding mode) */
32+
/* decode funct3 field: insn[14:12] — only used by F-extension (rounding mode)
33+
*/
3334
#if RV32_HAS(EXT_F)
3435
static inline uint32_t decode_funct3(const uint32_t insn)
3536
{
@@ -153,17 +154,17 @@ FORCE_INLINE bool csr_is_writable(const uint32_t csr)
153154
}
154155

155156
#if RV32_HAS(EXT_V)
156-
/* decode_veew: extract Effective Element Width from the width field insn[14:12].
157-
* RVV EEW encoding: 000→8-bit, 101→16-bit, 110→32-bit, 111→64-bit.
157+
/* decode_veew: extract Effective Element Width from the width field
158+
* insn[14:12]. RVV EEW encoding: 000→8-bit, 101→16-bit, 110→32-bit, 111→64-bit.
158159
* Returns 8, 16, 32, or 64 (as uint8_t stored in ir->eew).
159160
* Matches the decode_eew() + (8 << eew) calculation in decode_v.c.
160161
*/
161162
static inline uint8_t decode_veew(const uint32_t insn)
162163
{
163-
const uint8_t w = (uint8_t)((insn >> 12) & 0x7u);
164+
const uint8_t w = (uint8_t) ((insn >> 12) & 0x7u);
164165
/* w∈{0,1,2,3} → eew_exp=w; w∈{5,6,7} → eew_exp=w-4 (1,2,3) */
165-
const uint8_t e = (w < 4u) ? w : (uint8_t)(w - 4u);
166-
return (uint8_t)(8u << e);
166+
const uint8_t e = (w < 4u) ? w : (uint8_t) (w - 4u);
167+
return (uint8_t) (8u << e);
167168
}
168169
#endif /* RV32_HAS(EXT_V) */
169170

@@ -4871,7 +4872,7 @@ static inline bool op_lui(rv_insn_t *ir, const uint32_t insn)
48714872
static inline bool op_madd(rv_insn_t *ir, const uint32_t insn)
48724873
{
48734874
decode_r4type(ir, insn);
4874-
ir->rm = decode_funct3(insn); /* rounding mode */
4875+
ir->rm = decode_funct3(insn); /* rounding mode */
48754876

48764877
switch ((insn >> 25) & 0x3) {
48774878
#if RV32_HAS(EXT_F)
@@ -4892,7 +4893,7 @@ static inline bool op_madd(rv_insn_t *ir, const uint32_t insn)
48924893
static inline bool op_msub(rv_insn_t *ir, const uint32_t insn)
48934894
{
48944895
decode_r4type(ir, insn);
4895-
ir->rm = decode_funct3(insn); /* rounding mode */
4896+
ir->rm = decode_funct3(insn); /* rounding mode */
48964897

48974898
switch ((insn >> 25) & 0x3) {
48984899
#if RV32_HAS(EXT_F)
@@ -4913,7 +4914,7 @@ static inline bool op_msub(rv_insn_t *ir, const uint32_t insn)
49134914
static inline bool op_nmsub(rv_insn_t *ir, const uint32_t insn)
49144915
{
49154916
decode_r4type(ir, insn);
4916-
ir->rm = decode_funct3(insn); /* rounding mode */
4917+
ir->rm = decode_funct3(insn); /* rounding mode */
49174918

49184919
switch ((insn >> 25) & 0x3) {
49194920
#if RV32_HAS(EXT_F)
@@ -4934,7 +4935,7 @@ static inline bool op_nmsub(rv_insn_t *ir, const uint32_t insn)
49344935
static inline bool op_nmadd(rv_insn_t *ir, const uint32_t insn)
49354936
{
49364937
decode_r4type(ir, insn);
4937-
ir->rm = decode_funct3(insn); /* rounding mode */
4938+
ir->rm = decode_funct3(insn); /* rounding mode */
49384939

49394940
switch ((insn >> 25) & 0x3) {
49404941
#if RV32_HAS(EXT_F)
@@ -4955,7 +4956,7 @@ static inline bool op_nmadd(rv_insn_t *ir, const uint32_t insn)
49554956
static inline bool op_op_fp(rv_insn_t *ir, const uint32_t insn)
49564957
{
49574958
decode_rtype(ir, insn);
4958-
ir->rm = decode_funct3(insn); /* rounding mode */
4959+
ir->rm = decode_funct3(insn); /* rounding mode */
49594960

49604961
switch ((insn >> 25) & 0x3) {
49614962
case 0:
@@ -5134,7 +5135,6 @@ static inline bool op_op_fp(rv_insn_t *ir, const uint32_t insn)
51345135
#if RV32_HAS(EXT_V)
51355136
static inline bool op_op_v(rv_insn_t *ir, const uint32_t insn)
51365137
{
5137-
51385138
switch ((insn >> 12) & 0x7) {
51395139
case 0:
51405140
switch ((insn >> 26) & 0x3f) {
@@ -7935,20 +7935,39 @@ static inline bool op_system(rv_insn_t *ir, const uint32_t insn)
79357935
#if RV32_HAS(EXT_C)
79367936

79377937
/* RVC field decoders */
7938-
static inline uint16_t c_decode_rs1(const uint16_t insn) { return (insn >> 7) & 0x1f; }
7939-
static inline uint16_t c_decode_rs2(const uint16_t insn) { return (insn >> 2) & 0x1f; }
7940-
static inline uint16_t c_decode_rd(const uint16_t insn) { return (insn >> 7) & 0x1f; }
7941-
static inline uint16_t c_decode_rs1c(const uint16_t insn) { return (insn >> 7) & 0x7; }
7942-
static inline uint16_t c_decode_rs2c(const uint16_t insn) { return (insn >> 2) & 0x7; }
7943-
static inline uint16_t c_decode_rdc(const uint16_t insn) { return (insn >> 2) & 0x7; }
7938+
static inline uint16_t c_decode_rs1(const uint16_t insn)
7939+
{
7940+
return (insn >> 7) & 0x1f;
7941+
}
7942+
static inline uint16_t c_decode_rs2(const uint16_t insn)
7943+
{
7944+
return (insn >> 2) & 0x1f;
7945+
}
7946+
static inline uint16_t c_decode_rd(const uint16_t insn)
7947+
{
7948+
return (insn >> 7) & 0x1f;
7949+
}
7950+
static inline uint16_t c_decode_rs1c(const uint16_t insn)
7951+
{
7952+
return (insn >> 7) & 0x7;
7953+
}
7954+
static inline uint16_t c_decode_rs2c(const uint16_t insn)
7955+
{
7956+
return (insn >> 2) & 0x7;
7957+
}
7958+
static inline uint16_t c_decode_rdc(const uint16_t insn)
7959+
{
7960+
return (insn >> 2) & 0x7;
7961+
}
79447962

79457963
static inline bool op_rvc_q0(rv_insn_t *ir, const uint32_t insn)
79467964
{
79477965
switch ((insn >> 13) & 0x7) {
79487966
#if RV32_HAS(EXT_C)
79497967
case 0:
79507968
ir->rd = c_decode_rdc(insn) | 0x08;
7951-
ir->imm = ((insn & 0x1800) >> 7) | ((insn & 0x0780) >> 1) | ((insn & 0x0040) >> 4) | ((insn & 0x0020) >> 2);
7969+
ir->imm = ((insn & 0x1800) >> 7) | ((insn & 0x0780) >> 1) |
7970+
((insn & 0x0040) >> 4) | ((insn & 0x0020) >> 2);
79527971
ir->rs1 = rv_reg_sp;
79537972
ir->opcode = rv_insn_caddi4spn;
79547973
return true;
@@ -7957,31 +7976,35 @@ static inline bool op_rvc_q0(rv_insn_t *ir, const uint32_t insn)
79577976
case 2:
79587977
ir->rd = c_decode_rdc(insn) | 0x08;
79597978
ir->rs1 = c_decode_rs1c(insn) | 0x08;
7960-
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) | ((insn & 0x0020) << 1);
7979+
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) |
7980+
((insn & 0x0020) << 1);
79617981
ir->opcode = rv_insn_clw;
79627982
return true;
79637983
#endif /* RV32_HAS(EXT_C) */
79647984
#if RV32_HAS(EXT_F)
79657985
case 3:
79667986
ir->rd = c_decode_rdc(insn) | 0x08;
79677987
ir->rs1 = c_decode_rs1c(insn) | 0x08;
7968-
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) | ((insn & 0x0020) << 1);
7988+
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) |
7989+
((insn & 0x0020) << 1);
79697990
ir->opcode = rv_insn_cflw;
79707991
return true;
79717992
#endif /* RV32_HAS(EXT_F) */
79727993
#if RV32_HAS(EXT_C)
79737994
case 6:
79747995
ir->rs1 = c_decode_rs1c(insn) | 0x08;
79757996
ir->rs2 = c_decode_rs2c(insn) | 0x08;
7976-
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) | ((insn & 0x0020) << 1);
7997+
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) |
7998+
((insn & 0x0020) << 1);
79777999
ir->opcode = rv_insn_csw;
79788000
return true;
79798001
#endif /* RV32_HAS(EXT_C) */
79808002
#if RV32_HAS(EXT_F)
79818003
case 7:
79828004
ir->rs1 = c_decode_rs1c(insn) | 0x08;
79838005
ir->rs2 = c_decode_rs2c(insn) | 0x08;
7984-
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) | ((insn & 0x0020) << 1);
8006+
ir->imm = ((insn & 0x1C00) >> 7) | ((insn & 0x0040) >> 4) |
8007+
((insn & 0x0020) << 1);
79858008
ir->opcode = rv_insn_cfsw;
79868009
return true;
79878010
#endif /* RV32_HAS(EXT_F) */
@@ -8135,7 +8158,9 @@ static inline bool op_rvc_q1(rv_insn_t *ir, const uint32_t insn)
81358158
switch ((insn >> 13) & 0x7) {
81368159
#if RV32_HAS(EXT_C)
81378160
case 3:
8138-
ir->imm = ((insn & 0x0040) >> 2) | ((insn & 0x0020) << 1) | ((insn & 0x0018) << 4) | ((insn & 0x0004) << 3) | ((insn & 0x1000) >> 3);
8161+
ir->imm = ((insn & 0x0040) >> 2) | ((insn & 0x0020) << 1) |
8162+
((insn & 0x0018) << 4) | ((insn & 0x0004) << 3) |
8163+
((insn & 0x1000) >> 3);
81398164
ir->imm |= -(ir->imm & 0x200);
81408165
ir->rd = rv_reg_sp;
81418166
ir->rs1 = rv_reg_sp;
@@ -8214,7 +8239,10 @@ static inline bool op_rvc_q1(rv_insn_t *ir, const uint32_t insn)
82148239
#endif /* RV32_HAS(EXT_C) */
82158240
#if RV32_HAS(EXT_C)
82168241
case 1:
8217-
ir->imm = ((insn & 0x0800) >> 7) | ((insn & 0x0600) >> 1) | ((insn & 0x0100) << 2) | ((insn & 0x0080) >> 1) | ((insn & 0x0040) << 1) | ((insn & 0x0038) >> 2) | ((insn & 0x0004) << 3) | ((insn & 0x1000) >> 1);
8242+
ir->imm = ((insn & 0x0800) >> 7) | ((insn & 0x0600) >> 1) |
8243+
((insn & 0x0100) << 2) | ((insn & 0x0080) >> 1) |
8244+
((insn & 0x0040) << 1) | ((insn & 0x0038) >> 2) |
8245+
((insn & 0x0004) << 3) | ((insn & 0x1000) >> 1);
82188246
ir->imm |= -(ir->imm & 0x800);
82198247
ir->rd = rv_reg_ra;
82208248
ir->opcode = rv_insn_cjal;
@@ -8248,7 +8276,10 @@ static inline bool op_rvc_q1(rv_insn_t *ir, const uint32_t insn)
82488276
#endif /* RV32_HAS(EXT_C) */
82498277
#if RV32_HAS(EXT_C)
82508278
case 5:
8251-
ir->imm = ((insn & 0x0800) >> 7) | ((insn & 0x0600) >> 1) | ((insn & 0x0100) << 2) | ((insn & 0x0080) >> 1) | ((insn & 0x0040) << 1) | ((insn & 0x0038) >> 2) | ((insn & 0x0004) << 3) | ((insn & 0x1000) >> 1);
8279+
ir->imm = ((insn & 0x0800) >> 7) | ((insn & 0x0600) >> 1) |
8280+
((insn & 0x0100) << 2) | ((insn & 0x0080) >> 1) |
8281+
((insn & 0x0040) << 1) | ((insn & 0x0038) >> 2) |
8282+
((insn & 0x0004) << 3) | ((insn & 0x1000) >> 1);
82528283
ir->imm |= -(ir->imm & 0x800);
82538284
ir->rd = rv_reg_zero;
82548285
ir->opcode = rv_insn_cj;
@@ -8257,7 +8288,9 @@ static inline bool op_rvc_q1(rv_insn_t *ir, const uint32_t insn)
82578288
#if RV32_HAS(EXT_C)
82588289
case 6:
82598290
ir->rs1 = c_decode_rs1c(insn) | 0x08;
8260-
ir->imm = ((insn & 0x0C00) >> 7) | ((insn & 0x0060) << 1) | ((insn & 0x0018) >> 2) | ((insn & 0x0004) << 3) | ((insn & 0x1000) >> 4);
8291+
ir->imm = ((insn & 0x0C00) >> 7) | ((insn & 0x0060) << 1) |
8292+
((insn & 0x0018) >> 2) | ((insn & 0x0004) << 3) |
8293+
((insn & 0x1000) >> 4);
82618294
ir->imm |= -(ir->imm & 0x100);
82628295
ir->rs2 = rv_reg_zero;
82638296
ir->opcode = rv_insn_cbeqz;
@@ -8266,7 +8299,9 @@ static inline bool op_rvc_q1(rv_insn_t *ir, const uint32_t insn)
82668299
#if RV32_HAS(EXT_C)
82678300
case 7:
82688301
ir->rs1 = c_decode_rs1c(insn) | 0x08;
8269-
ir->imm = ((insn & 0x0C00) >> 7) | ((insn & 0x0060) << 1) | ((insn & 0x0018) >> 2) | ((insn & 0x0004) << 3) | ((insn & 0x1000) >> 4);
8302+
ir->imm = ((insn & 0x0C00) >> 7) | ((insn & 0x0060) << 1) |
8303+
((insn & 0x0018) >> 2) | ((insn & 0x0004) << 3) |
8304+
((insn & 0x1000) >> 4);
82708305
ir->imm |= -(ir->imm & 0x100);
82718306
ir->rs2 = rv_reg_zero;
82728307
ir->opcode = rv_insn_cbnez;
@@ -8394,7 +8429,8 @@ static inline bool op_rvc_q2(rv_insn_t *ir, const uint32_t insn)
83948429
#if RV32_HAS(EXT_C)
83958430
case 2:
83968431
ir->rd = c_decode_rd(insn);
8397-
ir->imm = ((insn & 0x1000) >> 7) | ((insn & 0x0070) >> 2) | ((insn & 0x000C) << 4);
8432+
ir->imm = ((insn & 0x1000) >> 7) | ((insn & 0x0070) >> 2) |
8433+
((insn & 0x000C) << 4);
83988434
ir->rs1 = rv_reg_sp;
83998435
if (unlikely(ir->rd == rv_reg_zero))
84008436
return false;
@@ -8404,7 +8440,8 @@ static inline bool op_rvc_q2(rv_insn_t *ir, const uint32_t insn)
84048440
#if RV32_HAS(EXT_F)
84058441
case 3:
84068442
ir->rd = c_decode_rd(insn);
8407-
ir->imm = ((insn & 0x1000) >> 7) | ((insn & 0x0070) >> 2) | ((insn & 0x000C) << 4);
8443+
ir->imm = ((insn & 0x1000) >> 7) | ((insn & 0x0070) >> 2) |
8444+
((insn & 0x000C) << 4);
84088445
ir->rs1 = rv_reg_sp;
84098446
ir->opcode = rv_insn_cflwsp;
84108447
return true;
@@ -8441,50 +8478,50 @@ static inline bool op_unimp(rv_insn_t *ir UNUSED, uint32_t insn UNUSED)
84418478
typedef bool (*decode_t)(rv_insn_t *ir, uint32_t insn);
84428479

84438480
static const decode_t rv_jump_table[] = {
8444-
op_load, /* 0 */
8481+
op_load, /* 0 */
84458482
op_load_fp, /* 1 */
8446-
op_unimp, /* 2 */
8447-
op_misc_mem, /* 3 */
8448-
op_op_imm, /* 4 */
8449-
op_auipc, /* 5 */
8450-
op_unimp, /* 6 */
8451-
op_unimp, /* 7 */
8452-
op_store, /* 8 */
8453-
op_store_fp, /* 9 */
8454-
op_unimp, /* 10 */
8455-
op_amo, /* 11 */
8456-
op_op, /* 12 */
8457-
op_lui, /* 13 */
8458-
op_unimp, /* 14 */
8459-
op_unimp, /* 15 */
8460-
op_madd, /* 16 */
8461-
op_msub, /* 17 */
8462-
op_nmsub, /* 18 */
8463-
op_nmadd, /* 19 */
8464-
op_op_fp, /* 20 */
8465-
op_op_v, /* 21 */
8466-
op_unimp, /* 22 */
8467-
op_unimp, /* 23 */
8468-
op_branch, /* 24 */
8469-
op_jalr, /* 25 */
8470-
op_unimp, /* 26 */
8471-
op_jal, /* 27 */
8472-
op_system, /* 28 */
8473-
op_unimp, /* 29 */
8474-
op_unimp, /* 30 */
8475-
op_unimp, /* 31 */
8483+
op_unimp, /* 2 */
8484+
op_misc_mem, /* 3 */
8485+
op_op_imm, /* 4 */
8486+
op_auipc, /* 5 */
8487+
op_unimp, /* 6 */
8488+
op_unimp, /* 7 */
8489+
op_store, /* 8 */
8490+
op_store_fp, /* 9 */
8491+
op_unimp, /* 10 */
8492+
op_amo, /* 11 */
8493+
op_op, /* 12 */
8494+
op_lui, /* 13 */
8495+
op_unimp, /* 14 */
8496+
op_unimp, /* 15 */
8497+
op_madd, /* 16 */
8498+
op_msub, /* 17 */
8499+
op_nmsub, /* 18 */
8500+
op_nmadd, /* 19 */
8501+
op_op_fp, /* 20 */
8502+
op_op_v, /* 21 */
8503+
op_unimp, /* 22 */
8504+
op_unimp, /* 23 */
8505+
op_branch, /* 24 */
8506+
op_jalr, /* 25 */
8507+
op_unimp, /* 26 */
8508+
op_jal, /* 27 */
8509+
op_system, /* 28 */
8510+
op_unimp, /* 29 */
8511+
op_unimp, /* 30 */
8512+
op_unimp, /* 31 */
84768513
};
84778514

84788515
#if RV32_HAS(EXT_C)
84798516
static const decode_t rvc_jump_table[] = {
8480-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=0 */
8481-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=1 */
8482-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=2 */
8483-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=3 */
8484-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=4 */
8485-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=5 */
8486-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=6 */
8487-
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=7 */
8517+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=0 */
8518+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=1 */
8519+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=2 */
8520+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=3 */
8521+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=4 */
8522+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=5 */
8523+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=6 */
8524+
op_rvc_q0, op_rvc_q1, op_rvc_q2, op_unimp, /* funct3=7 */
84888525
};
84898526
#endif /* RV32_HAS(EXT_C) */
84908527

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