Introduce basic block

This commit introduces the basic block in emulator, meaning that
it makes emulator decode and execute numerous instructions at a
time.

Use hash table and block prediction to manage blocks efficiently.

In decode stage, allocate a new block which contains up to 1024
instruction by default, decode the instruction into block until it
is full or the latest instruction is a branch instruction and put
it into the block map.

In execution stage, emulator executes instructions in block. The
number of instructions based on the member insn_num in struct block.

In particular, when an exception/interrupt occurs, emulator will do
the following steps:
1. Execute the exception/interrupt handler that resets a new program
   counter from the register mtvec and function emulate returns false.
2. Enter to the decode stage again, and create new block based on the
   new program counter.
That is, emulator will stop executing old block and create the new one
from new program counter.

Author: Risheng1128

Makefile

@@ -98,6 +98,7 @@ OBJS := \
 	utils.o \
 	decode.o \
 	emulate.o \
+	riscv.o \
 	io.o \
 	elf.o \
 	main.o \

src/decode.c

@@ -4,7 +4,6 @@
  */
 
 #include <assert.h>
-#include <stdio.h>
 
 #include "decode.h"
 
@@ -1653,19 +1652,18 @@ static inline bool op_cbnez(struct rv_insn_t *ir, const uint32_t insn)
 #define op_cfsd OP_UNIMP
 
 /* handler for all unimplemented opcodes */
-static inline bool op_unimp(struct rv_insn_t *rv_insn UNUSED,
-                            uint32_t insn UNUSED)
+static inline bool op_unimp(struct rv_insn_t *ir UNUSED, uint32_t insn UNUSED)
 {
     return false;
 }
 
 /* RV32 decode handler type */
-typedef bool (*decode_t)(struct rv_insn_t *rv_insn, uint32_t insn);
+typedef bool (*decode_t)(struct rv_insn_t *ir, uint32_t insn);
 
 /* decode RISC-V instruction */
-bool rv_decode(struct rv_insn_t *ir, uint32_t insn, uint8_t *insn_len)
+bool rv_decode(struct rv_insn_t *ir, uint32_t insn)
 {
-    assert(ir && insn_len);
+    assert(ir);
 
 #define OP_UNIMP op_unimp
 #define OP(insn) op_##insn
@@ -1704,7 +1702,7 @@ bool rv_decode(struct rv_insn_t *ir, uint32_t insn, uint8_t *insn_len)
     if ((insn & FC_OPCODE) != 3) {
         insn &= 0x0000FFFF;
         const uint16_t c_index = (insn & FC_FUNC3) >> 11 | (insn & FC_OPCODE);
-        *insn_len = INSN_16;
+        ir->insn_len = INSN_16;
 
         /* decode instruction (compressed instructions) */
         const decode_t op = rvc_jump_table[c_index];
@@ -1715,7 +1713,7 @@ bool rv_decode(struct rv_insn_t *ir, uint32_t insn, uint8_t *insn_len)
 
     /* standard uncompressed instruction */
     const uint32_t index = (insn & INSN_6_2) >> 2;
-    *insn_len = INSN_32;
+    ir->insn_len = INSN_32;
 
     /* decode instruction */
     const decode_t op = rv_jump_table[index];

src/decode.h

@@ -7,6 +7,7 @@
 
 #include <stdbool.h>
 #include <stdint.h>
+#include <stdlib.h>
 
 enum {
     /* RV32I Base Instruction Set */
@@ -219,7 +220,6 @@ enum {
 /* clang-format on */
 
 enum {
-    INSN_UNKNOWN = 0,
     INSN_16 = 2,
     INSN_32 = 4,
 };
@@ -236,6 +236,32 @@ struct rv_insn_t {
 #if RV32_HAS(EXT_C)
     uint8_t shamt;
 #endif
+
+    /* instruction length */
+    uint8_t insn_len;
+};
+
+/* translated basic block */
+struct block {
+    /* number of instructions encompased */
+    uint32_t insn_number;
+    /* address range of the basic block */
+    uint32_t pc_start, pc_end;
+    /* maximum of instructions encompased */
+    uint32_t insn_capacity;
+    /* block predictoin */
+    struct block *predict;
+    /* memory blocks */
+    struct rv_insn_t *ir;
+};
+
+struct block_map {
+    /* max number of entries in the block map */
+    uint32_t block_capacity;
+    /* number of entries currently in the map */
+    uint32_t size;
+    /* block map */
+    struct block **map;
 };
 
 /* sign extend a 16 bit value */
@@ -250,7 +276,20 @@ static inline uint32_t sign_extend_b(const uint32_t x)
     return (int32_t) ((int8_t) x);
 }
 
+/* clear all block in the block map */
+static inline void block_map_clear(struct block_map *map)
+{
+    assert(map);
+    for (uint32_t i = 0; i < map->block_capacity; i++) {
+        struct block *block = map->map[i];
+        if (block) {
+            free(block->ir);
+            free(block);
+            map->map[i] = NULL;
+        }
+    }
+    map->size = 0;
+}
+
 /* decode the RISC-V instruction */
-bool rv_decode(struct rv_insn_t *rv_insn,
-               const uint32_t insn,
-               uint8_t *insn_len);
+bool rv_decode(struct rv_insn_t *ir, const uint32_t insn);