Torch-FL/torch_fl/configs/backends_tsingmicro.conf at main · tonyh168/Torch-FL · GitHub

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# flagos op backend config for TsingMicro
# Format: op_name = backend
# backend: flaggems | flagos_python
# Default (unlisted ops): flaggems
#
# Note: tsingmicro registers the *full* generated op list on PrivateUse1 (it
# takes the `#else` branch in csrc/aten/register.cc), so an op claimed there
# with no kernel behind it reaches the dispatcher and raises instead of boxing
# to cpu_fallback. An entry of `none` would therefore be a guaranteed raise,
# which is why this conf carries no `none` entry (asserted by
# tests/unit/test_gen_vendor_confs.py) and stays hand-written and sparse
# instead of being generated full-coverage.
#
# Override: FLAGOS_BACKEND_CONFIG=/path/to/backends.conf

mm = flaggems
mm.out = flaggems
bmm = flaggems
bmm.out = flaggems
cat = flaggems
embedding = flaggems
add.Tensor = flaggems
mul.Tensor = flaggems
silu = flaggems
rsqrt = flaggems
mean.dim = flaggems
cos = flaggems
sin = flaggems
neg = flaggems
pow.Tensor_Scalar = flaggems
all = flaggems
_softmax = flaggems
bitwise_and.Tensor = flaggems
le.Tensor = flaggems
where.self = flaggems
index.Tensor = flaggems
new_ones = flaggems
scalar_tensor = flaggems
ones_like = flaggems
zeros = flaggems
silu_backward = flaggems
sum.dim_IntList = flaggems
slice_backward = flaggems
constant_pad_nd = flaggems
embedding_dense_backward = flaggems
nll_loss_forward = flaggems
nll_loss_backward = flaggems
argmax = flaggems
argmin = flaggems
fill_.Scalar = flaggems
arange = flaggems
arange.start_step = flaggems
sub.Tensor = flaggems
eq.Tensor = flaggems
eq.Scalar = flaggems
max = flaggems
bitwise_not = flaggems
bitwise_or.Tensor = flaggems
any = flaggems
any.dim = flaggems
isin.Tensor_Tensor = flaggems
masked_fill_.Scalar = flaggems
lt.Tensor = flaggems
lt.Scalar = flaggems
cumsum = flaggems
abs = flagos_python
acos = flagos_python
div.Scalar = flaggems
# Ops the Qwen-Image-2.1 path sent to cpu_fallback on the TX8110 build (census
# of 2026-10-19: isneginf/all ~33 per denoise step, tanh/index_select/tril/
# zero_ per step, plus the text-encode and VAE phases). Each was then measured
# against CPU by calling the exact `flag_gems.*` function its generated wrapper
# invokes -- the survey's torch-level path would silently cpu_fallback for an
# op the build does not claim yet (2026-10-21, fp32 and bf16, 32x32 and 4D,
# max|d| = 0 in every case).
#
# Two more the Qwen-Image-2.1 math-SDPA path sent to cpu_fallback, found with
# overload-level fallback logging (2026-10-21):
#   * native_batch_norm -- `nn.LayerNorm(elementwise_affine=False)` decomposes to
#     it on PrivateUse1, twice per transformer block (~67 per step). The internal
#     FlagGems build did not export `flag_gems.native_batch_norm`; the official
#     5.4.0 does, so the generated wrapper resolves.
#   * where.self_out -- the math SDPA applies its -inf masking through the out
#     variant (~35 per step); `where.self` alone does not cover it.
# `add.out` has no `flag_gems.add_out`, and `where.Scalar*` / `add.Scalar` are
# absent from the generated op set / kFlagGems dispatcher respectively, so they
# stay on cpu_fallback.
all.dim = flaggems
clamp_min = flaggems
div.Tensor = flaggems
gelu = flaggems
gt.Scalar = flaggems
gt.Tensor = flaggems
index_select = flaggems
isneginf = flaggems
native_batch_norm = flaggems
nonzero = flaggems
tanh = flaggems
tril = flaggems
where.self_out = flaggems
zero_ = flaggems
# Metadata-only view ops. TsingMicro has no accelerator kernel for any of
# these -- its non-FlagGems implementations are the CUDA boxing kernels, which
# need a vendor CUDA runtime the TX8110 wheel does not link (FLAGOS_BUILD_BOXING
# is off). Left unlisted they fall through the `flaggems` default to
# Dispatcher::GetFn, whose FlagGems slot is empty, and degrade to cuda_fn_ --
# dying in torch/cuda with
#
#   NotImplementedError: Could not run 'aten::as_strided' with arguments from
#   the 'CUDA' backend
#
# which is what every `mask[:, 0] = 1` in the model tests reduces to. They are
# pure stride arithmetic (at::native::* metadata helpers, no device kernel), so
# routing them to the tsingmicro slot is free and keeps the tensor on flagos.
alias = tsingmicro
detach = tsingmicro
permute = tsingmicro
select.int = tsingmicro
slice.Tensor = tsingmicro
squeeze = tsingmicro
squeeze.dim = tsingmicro
t = tsingmicro
transpose.int = tsingmicro
unbind.int = tsingmicro
unsqueeze = tsingmicro
_conj = tsingmicro
_neg_view = tsingmicro
_unsafe_view = tsingmicro