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graph: backend: dnnl: layout prop: reorder src to abc for LayerNorm
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2 files changed

+11
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src/graph/backend/dnnl/layout_propagator.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright 2022-2023 Intel Corporation
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* Copyright 2022-2024 Intel Corporation
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
@@ -735,6 +735,12 @@ status_t layout_propagator_for_layernorm(op_ptr &op,
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const auto &pd
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= layernorm_executable_t::create_desc(op, p_engine, mgr, pd_cache);
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insert_reorder_before(
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op, 0, pd.src_desc(), p_engine, mgr, pd_cache, rewriter);
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value_ptr src = op->get_input_value(0);
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status = fill_layout_info(src, pd.src_desc());
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if (status != status::success) return status;
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insert_reorder_after(
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op, 0, pd.dst_desc(), p_engine, mgr, pd_cache, rewriter);
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value_ptr dst = op->get_output_value(0);

src/graph/backend/dnnl/op_executable.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -751,9 +751,12 @@ layernorm_executable_t::desc_t layernorm_executable_t::create_desc(
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auto src = make_dnnl_memory_desc(
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op->get_input_value(0)->get_logical_tensor());
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// onednn spec: Implementations optimized for memory formats ab, abc, bac
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// and abcd
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src = to_ncx_format(src);
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auto dst = make_dnnl_memory_desc(
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op->get_output_value(0)->get_logical_tensor());
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dst = to_format_any(dst);
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dnnl::layer_normalization_forward::primitive_desc pd(
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p_engine, pkind, src, dst, epsilon, flags, prm_attr);
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