cpu: x64: avoid repeated bias loads in brgconv postops kernel

Author: kwiersch

src/cpu/x64/jit_brgemm_post_ops.hpp

@@ -1,5 +1,5 @@
 /*******************************************************************************
-* Copyright 2020-2022 Intel Corporation
+* Copyright 2020-2023 Intel Corporation
 *
 * Licensed under the Apache License, Version 2.0 (the "License");
 * you may not use this file except in compliance with the License.
@@ -692,14 +692,14 @@ struct jit_brgemm_kernel_post_ops : public jit_generator {
         if (req_comp) maybe_apply_comp(m_block, n_block, tail);
 
         if (brg.alpha != 0 && jcp.with_bias) {
-            for_(int m = 0; m < m_block; m++)
             for (int n = 0; n < n_block; n++) {
                 auto vmm_bias = vmm_tmp(0);
                 auto bias_addr = ptr[aux_reg_bias
                         + bia_typesize_ * (n * brg.ld_block)];
-
                 cvt2ps(bia_dt_, vmm_bias, bias_addr, tail, false, k_mask);
-                vaddps(vector(m, n), vmm_bias);
+                for (int m = 0; m < m_block; m++) {
+                    vaddps(vector(m, n), vmm_bias);
+                }
             }
         }