diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.c b/drivers/gpu/drm/hisilicon/hisi_ade.c
index 0901f5ef207137..ed1ce758b5aac7 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.c
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.c
@@ -15,11 +15,10 @@
 #include <linux/component.h>
 #include <video/display_timing.h>
 
-
+#include <drm/drmP.h>
 #include <drm/drm_crtc.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_gem_cma_helper.h>
-#include <drm/drm_encoder_slave.h>
 #include <drm/drm_plane_helper.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_atomic_helper.h>
@@ -28,33 +27,41 @@
 #include "hisi_drm_fbdev.h"
 #include "hisi_drm_drv.h"
 #include "hisi_drm_plane.h"
+#include "hisi_drm_crtc.h"
 #include "hisi_ade_reg.h"
-#include "hisi_ade.h"
 
 #define FORCE_PIXEL_CLOCK_SAME_OR_HIGHER 0
 #define PRIMARY_CH	(ADE_CH1)
 
-#define to_ade_crtc(c)		container_of(c, struct hisi_crtc, base)
+#define to_ade_crtc(c)		container_of(c, struct ade_crtc, base.base)
 
+struct ade_crtc {
+	struct hisi_crtc base;
+	void *ade;
+	struct drm_display_mode *dmode;
+	u32 ch_mask;
+	u64 use_mask;
+};
 
-struct ade_context {
+struct resource_context {
 	void __iomem  *base;
 	void __iomem  *media_base;
-	
+
 	int irq;
 	u32 ade_core_rate;
 	u32 media_noc_rate;
-
-	struct drm_device  *dev;
-
+	
 	struct clk *ade_core_clk;
 	struct clk *media_noc_clk;
 	struct clk *ade_pix_clk;
-
-	struct hisi_crtc *crtc;
-	struct hisi_plane *plane[ADE_CH_NUM];
-
 	bool power_on;
+};
+
+struct hisi_ade {
+	struct resource_context ctx;
+	struct drm_device  *dev;
+	struct ade_crtc acrtc;
+	struct hisi_plane hplane[ADE_CH_NUM];
 
 };
 
@@ -97,6 +104,7 @@ static const uint32_t channel_formats1[] = {
 	DRM_FORMAT_RGBA8888, DRM_FORMAT_BGRA8888, DRM_FORMAT_ARGB8888,
 	DRM_FORMAT_ABGR8888
 };
+
 static const uint32_t channel_formats2[] = {
 	/* channel 5,6 */
 	DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
@@ -105,6 +113,7 @@ static const uint32_t channel_formats2[] = {
 	DRM_FORMAT_ABGR8888, DRM_FORMAT_YUYV, DRM_FORMAT_YVYU, DRM_FORMAT_UYVY,
 	DRM_FORMAT_VYUY, DRM_FORMAT_NV12, DRM_FORMAT_NV21, DRM_FORMAT_YUV444
 };
+
 static const uint32_t channel_formats3[] = {
 	/* disp channel 7 */
 	DRM_FORMAT_RGB565, DRM_FORMAT_BGR565, DRM_FORMAT_RGB888,
@@ -114,9 +123,9 @@ static const uint32_t channel_formats3[] = {
 	DRM_FORMAT_VYUY, DRM_FORMAT_YUV444
 };
 
-static void ade_display_commit(struct hisi_crtc *crtc);
+static void ade_display_commit(struct ade_crtc *crtc);
 
-u32 ade_get_channel_formats(u32 ch, const u32 **formats)
+u32 ade_get_channel_formats(u8 ch, const u32 **formats)
 {
 	switch(ch)
 	{
@@ -170,8 +179,9 @@ static bool ade_is_need_csc(u32 fmt)
 	}
 }
 
-static void ade_init(struct ade_context *ctx)
+static void ade_init(struct hisi_ade *ade)
 {
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 
 	/* enable clk gate */
@@ -190,8 +200,9 @@ static void ade_init(struct ade_context *ctx)
 	set_TOP_CTL_frm_end_start(base, 1);
 }
 
-static void ade_ldi_set_mode(struct ade_context *ctx, struct drm_display_mode *mode)
+static void ade_ldi_set_mode(struct hisi_ade *ade, struct drm_display_mode *mode)
 {
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 	u32 hfp, hbp, hsw, vfp, vbp, vsw;
 	u32 plr_flags;
@@ -238,9 +249,10 @@ static void ade_ldi_set_mode(struct ade_context *ctx, struct drm_display_mode *m
 	set_reg(base + LDI_DE_SPACE_LOW, 0x1, 1, 1);
 }
 
-static int ade_power_up(struct ade_context *ctx)
+static int ade_power_up(struct hisi_ade *ade)
 {
-	void __iomem *media_base = ctx->media_base;
+	void __iomem *media_base = ade->ctx.media_base;
+	struct resource_context *ctx = &ade->ctx;
 	int ret;
 
 	ret = clk_set_rate(ctx->ade_core_clk, ctx->ade_core_rate);
@@ -267,13 +279,14 @@ static int ade_power_up(struct ade_context *ctx)
 		return ret;
 	}
 
-	ade_init(ctx);
-	ctx->power_on = true;
+	ade_init(ade);
+	ade->ctx.power_on = true;
 	return 0;
 }
 
-static void ade_power_down(struct ade_context *ctx)
+static void ade_power_down(struct hisi_ade *ade)
 {
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 	void __iomem *media_base = ctx->media_base;
 
@@ -287,62 +300,54 @@ static void ade_power_down(struct ade_context *ctx)
 	ctx->power_on = false;
 }
 
-void  hisi_crtc_enable(struct drm_crtc *c)
+static void ade_crtc_enable(struct hisi_crtc *hcrtc)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
-	int ret;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
 
-	DRM_DEBUG_DRIVER("enter.\n");
-	if (crtc->enable)
-		return;
+	int ret;
 
-	if (!ctx->power_on) {
-		ret = ade_power_up(ctx);
+	if (!ade->ctx.power_on) {
+		ret = ade_power_up(ade);
 		if (ret) {
 			DRM_ERROR("failed to initialize ade clk\n");
 			return ;
 		}
 	}
 
-	drm_crtc_vblank_on(c);
-	ade_display_commit(crtc);
+	ade_display_commit(acrtc);
 
-	crtc->enable = true;
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-void hisi_crtc_disable(struct drm_crtc *c)
+static void ade_crtc_disable(struct hisi_crtc *hcrtc)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
 
 	DRM_DEBUG_DRIVER("enter.\n");
-	if (!crtc->enable)
-		return;
 
-	drm_crtc_vblank_off(c);
-	ade_power_down(ctx);
+	ade_power_down(ade);
 
-	crtc->enable = false;
-	crtc->ch_mask = 0;
-	crtc->use_mask = 0;
+	acrtc->ch_mask = 0;
+	acrtc->use_mask = 0;
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-bool hisi_drm_crtc_mode_fixup(struct drm_crtc *c,
+bool ade_crtc_mode_fixup(struct hisi_crtc *hcrtc,
 				      const struct drm_display_mode *mode,
 				      struct drm_display_mode *adj_mode)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	u32 clock_kHz = mode->clock;
 	int ret;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	if (!ctx->power_on)
-		if (ade_power_up(ctx))
+	if (!ade->ctx.power_on)
+		if (ade_power_up(ade))
 			DRM_ERROR("%s: failed to power up ade\n", __func__);
 
 	do {
@@ -369,41 +374,42 @@ bool hisi_drm_crtc_mode_fixup(struct drm_crtc *c,
 	return true;
 }
 
-void hisi_drm_crtc_mode_set_nofb(struct drm_crtc *c)
+void ade_crtc_mode_set_nofb(struct hisi_crtc *hcrtc)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
 
 	DRM_DEBUG_DRIVER("enter.\n");
-	crtc->dmode = &c->state->mode;
-	ade_ldi_set_mode(ctx, &c->state->mode);
+	acrtc->dmode = &hcrtc->base.state->mode;
+	ade_ldi_set_mode(ade, &hcrtc->base.state->mode);
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-void hisi_crtc_atomic_begin(struct drm_crtc *c)
+void ade_crtc_atomic_begin(struct hisi_crtc *hcrtc)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
 
 	DRM_DEBUG_DRIVER("enter.\n");
-	if (!ctx->power_on)
-		(void) ade_power_up(ctx);
+	if (!ade->ctx.power_on)
+		(void) ade_power_up(ade);
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
 /*
  * set modules' reset mode: by software or hardware
  * set modules' reload enable/disable
- */
-static void ade_set_reset_and_reload(struct hisi_crtc *crtc)
+ * */
+static void ade_set_reset_and_reload(struct ade_crtc *acrtc)
 {
-	struct ade_context *ctx = crtc->ctx;
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
-	u32 mask0 = (u32)crtc->use_mask;
-	u32 mask1 = (u32)(crtc->use_mask >> 32);
+	u32 mask0 = (u32)acrtc->use_mask;
+	u32 mask1 = (u32)(acrtc->use_mask >> 32);
 
 	DRM_DEBUG_DRIVER("mask=0x%llX, mask0=0x%X, mask1=0x%X\n",
-			crtc->use_mask, mask0, mask1);
+			acrtc->use_mask, mask0, mask1);
 
 	writel(mask0, base + ADE_SOFT_RST_SEL0);
 	writel(mask1, base + ADE_SOFT_RST_SEL1);
@@ -414,13 +420,13 @@ static void ade_set_reset_and_reload(struct hisi_crtc *crtc)
 /*
  * commit to ldi to display
  */
-static void ade_display_commit(struct hisi_crtc *crtc)
+static void ade_display_commit(struct ade_crtc *acrtc)
 {
-	struct ade_context *ctx = crtc->ctx;
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
-	u32 out_w = crtc->dmode->hdisplay;
-	u32 out_h = crtc->dmode->vdisplay;
-	u8 val;
+	u32 out_w = acrtc->dmode->hdisplay;
+	u32 out_h = acrtc->dmode->vdisplay;
 
 	/* TODO: set rotator after overlay */
 
@@ -428,16 +434,16 @@ static void ade_display_commit(struct hisi_crtc *crtc)
 
 	/* display source setting */
 	writel(TOP_DISP_SRC_OVLY2, base + ADE_DISP_SRC_CFG);
-
+	
 	/* ctran6 setting */
 	writel(1, base + ADE_CTRAN_DIS(ADE_CTRAN6));
 	writel(out_w * out_h - 1, base + ADE_CTRAN_IMAGE_SIZE(ADE_CTRAN6));
-	crtc->use_mask |= BIT(ADE_CTRAN_BIT_OFST + ADE_CTRAN6);
+	acrtc->use_mask |= BIT(ADE_CTRAN_BIT_OFST + ADE_CTRAN6);
 
 	/* set reset mode:soft or hw, and reload modules */
-	ade_set_reset_and_reload(crtc);
+	ade_set_reset_and_reload(acrtc);
 
-	DRM_DEBUG_DRIVER("ADE GO: %dx%d \n", out_w, out_h);
+	DRM_INFO("ADE GO: %dx%d \n", out_w, out_h);
 	/* enable ade */
 	wmb();
 	writel(ADE_ENABLE, base + ADE_EN);
@@ -447,17 +453,19 @@ static void ade_display_commit(struct hisi_crtc *crtc)
 	set_reg(base + LDI_HDMI_DSI_GT, 0x0, 1, 0);
 }
 
-void hisi_crtc_atomic_flush(struct drm_crtc *c)
+void ade_crtc_atomic_flush(struct hisi_crtc *hcrtc)
 
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 
 	DRM_DEBUG_DRIVER("enter.\n");
-	if (crtc->enable) {
+	/* commit to  display: LDI input setting */
+	if (acrtc->base.enable) {
 		/* set reset and reload */
-		ade_set_reset_and_reload(crtc);
+		ade_set_reset_and_reload(acrtc);
 		/* flush ade regitsters */
 		wmb();
 		writel(ADE_ENABLE, base + ADE_EN);
@@ -465,27 +473,19 @@ void hisi_crtc_atomic_flush(struct drm_crtc *c)
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-void hisi_drm_crtc_mode_prepare(struct drm_crtc *c)
+void ade_crtc_mode_prepare(struct hisi_crtc *hcrtc)
 {
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-	struct ade_context *ctx = crtc->ctx;
+	struct ade_crtc *acrtc = to_ade_crtc(&hcrtc->base);
+	struct hisi_ade *ade = acrtc->ade;
 
 	DRM_DEBUG_DRIVER("enter.\n");
-	if (!ctx->power_on)
-		(void) ade_power_up(ctx);
+	if (!ade->ctx.power_on)
+		(void) ade_power_up(ade);
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-void hisi_drm_crtc_destroy(struct drm_crtc *c)
-{
-	struct hisi_crtc *crtc = to_ade_crtc(c);
-
-	drm_crtc_cleanup(c);
-	devm_kfree(c->dev->dev, crtc);
-}
-
-static int hisi_drm_ade_dts_parse(struct platform_device *pdev,
-				    struct ade_context *ctx)
+static int hisi_ade_dts_parse(struct platform_device *pdev,
+				struct resource_context *ctx)
 {
 	struct resource	    *res;
 	struct device   *dev;
@@ -550,32 +550,35 @@ static int hisi_drm_ade_dts_parse(struct platform_device *pdev,
 
 int hisi_drm_enable_vblank(struct drm_device *dev, int c)
 {
-	struct hisi_drm_private *private = dev->dev_private;
-	struct hisi_crtc *crtc = to_ade_crtc(private->crtc);
-	struct ade_context *ctx = crtc->ctx;
+	struct hisi_drm_private *priv = dev->dev_private;
+	struct ade_crtc *acrtc = to_ade_crtc(priv->crtc);
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 	u32 intr_en;
 
 	DRM_INFO("enable_vblank enter.\n");
-	if (!ctx->power_on)
-		(void) ade_power_up(ctx);
+	if (!ade->ctx.power_on)
+		(void) ade_power_up(ade);
 
 	intr_en = readl(base + LDI_INT_EN);
 	intr_en |= LDI_ISR_FRAME_END_INT;
 	writel(intr_en, base + LDI_INT_EN);
+
 	return 0;
 }
 
 void hisi_drm_disable_vblank(struct drm_device *dev, int c)
 {
-	struct hisi_drm_private *private = dev->dev_private;
-	struct hisi_crtc *crtc = to_ade_crtc(private->crtc);
-	struct ade_context *ctx = crtc->ctx;
+	struct hisi_drm_private *priv = dev->dev_private;
+	struct ade_crtc *acrtc = to_ade_crtc(priv->crtc);
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 	u32 intr_en;
 
 	DRM_INFO("disable_vblank enter.\n");
-	if (!ctx->power_on) {
+	if (!ade->ctx.power_on) {
 		DRM_ERROR("power is down! vblank disable fail\n");
 		return ;
 	}
@@ -587,9 +590,10 @@ void hisi_drm_disable_vblank(struct drm_device *dev, int c)
 irqreturn_t hisi_drm_irq_handler(int irq, void *arg)
 {
 	struct drm_device *dev = (struct drm_device *) arg;
-	struct hisi_drm_private *private = dev->dev_private;
-	struct hisi_crtc *crtc = to_ade_crtc(private->crtc);
-	struct ade_context *ctx = crtc->ctx;
+	struct hisi_drm_private *priv = dev->dev_private;
+	struct ade_crtc *acrtc = to_ade_crtc(priv->crtc);
+	struct hisi_ade *ade = acrtc->ade;
+	struct resource_context *ctx = &ade->ctx;
 	void __iomem *base = ctx->base;
 	u32 status;
 
@@ -599,20 +603,19 @@ irqreturn_t hisi_drm_irq_handler(int irq, void *arg)
 	/* vblank irq */
 	if (status & LDI_ISR_FRAME_END_INT) {
 		writel(LDI_ISR_FRAME_END_INT, base + LDI_INT_CLR);
-		drm_handle_vblank(dev, drm_crtc_index(&crtc->base));
+		drm_handle_vblank(dev, drm_crtc_index(&acrtc->base.base));
 	}
 
 	return IRQ_HANDLED;
 }
 
-
-static void ade_rdma_set(struct hisi_crtc *crtc, struct drm_framebuffer *fb, u32 ch,
+static void ade_rdma_set(struct ade_crtc *acrtc, struct drm_framebuffer *fb, u32 ch,
 			 u32 x, u32 y, u32 in_w, u32 in_h, u32 fmt)
 {
 	u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en;
 	struct drm_gem_cma_object *obj = hisi_drm_fb_get_gem_obj(fb, 0);
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u32 stride;
 	u32 addr;
 
@@ -660,13 +663,13 @@ static void ade_rdma_set(struct hisi_crtc *crtc, struct drm_framebuffer *fb, u32
 	writel(in_h * stride, base + reg_space);
 	writel(1, base + reg_en);
 	
-	crtc->use_mask |= BIT(ADE_CH_RDMA_BIT_OFST + ch);
+	acrtc->use_mask |= BIT(ADE_CH_RDMA_BIT_OFST + ch);
 }
 
-static void ade_rdma_disable(struct hisi_crtc *crtc, u32 ch)
+static void ade_rdma_disable(struct ade_crtc *acrtc, u32 ch)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u32 reg_en;
 
 	/* get reg offset */
@@ -680,14 +683,14 @@ static void ade_rdma_disable(struct hisi_crtc *crtc, u32 ch)
 	}
 
 	writel(0, base + reg_en);
-	crtc->use_mask &= ~BIT(ADE_CH_RDMA_BIT_OFST + ch);
+	acrtc->use_mask &= ~BIT(ADE_CH_RDMA_BIT_OFST + ch);
 }
 
-static void ade_clip_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
+static void ade_clip_set(struct ade_crtc *acrtc, u32 ch, u32 in_w, u32 in_h,
 			 u32 *out_w, u32 *out_h)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	bool need_clip = false;
 	u32 o_w, o_h;
 	u32 disable_val;
@@ -716,27 +719,26 @@ static void ade_clip_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
 	*out_w = o_w;
 	*out_h = o_h;
 
-	crtc->use_mask |= BIT(ADE_CLIP_BIT_OFST + ch);
+	acrtc->use_mask |= BIT(ADE_CLIP_BIT_OFST + ch);
 }
 
-static void ade_clip_disable(struct hisi_crtc *crtc, u32 ch)
+static void ade_clip_disable(struct ade_crtc *acrtc, u32 ch)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 
 	if (ch == ADE_DISP)
 		return;
 
 	writel(1, base + ADE_CLIP_DISABLE(ch));
-	//writel(1, base + ADE_CLIP_CFG_OK(ch));
-	crtc->use_mask &= ~BIT(ADE_CLIP_BIT_OFST + ch);
+	acrtc->use_mask &= ~BIT(ADE_CLIP_BIT_OFST + ch);
 }
 
-static void ade_scale_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
+static void ade_scale_set(struct ade_crtc *acrtc, u32 ch, u32 in_w, u32 in_h,
 			  u32 *out_w, u32 *out_h)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	bool need_scale = false;
 	u32 o_w, o_h;
 	u32 ctrl_val;
@@ -775,13 +777,13 @@ static void ade_scale_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
 	*out_w = o_w;
 	*out_h = o_h;
 
-	crtc->use_mask |= BIT(ADE_SCL_BIT_OFST + x);
+	acrtc->use_mask |= BIT(ADE_SCL_BIT_OFST + x);
 }
 
-static void ade_scale_disable(struct hisi_crtc *crtc, u32 ch)
+static void ade_scale_disable(struct ade_crtc *acrtc, u32 ch)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u8 x;
 
 	switch (ch) {
@@ -796,17 +798,17 @@ static void ade_scale_disable(struct hisi_crtc *crtc, u32 ch)
 	}
 
 	writel(0, base + ADE_SCL_START(x));
-	crtc->use_mask &= ~BIT(ADE_SCL_BIT_OFST + x);
+	acrtc->use_mask &= ~BIT(ADE_SCL_BIT_OFST + x);
 }
 
 /*
  * corlor space converting
  * */
-static void ade_ctran_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
+static void ade_ctran_set(struct ade_crtc *acrtc, u32 ch, u32 in_w, u32 in_h,
 			  u32 fmt)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	bool need_ctran = ade_is_need_csc(fmt);
 	u8 x;
 
@@ -834,13 +836,13 @@ static void ade_ctran_set(struct hisi_crtc *crtc, u32 ch, u32 in_w, u32 in_h,
 	} else {/* TODO */
 	}
 
-	crtc->use_mask |= BIT(ADE_CTRAN_BIT_OFST + x);
+	acrtc->use_mask |= BIT(ADE_CTRAN_BIT_OFST + x);
 }
 
-static void ade_ctran_disable(struct hisi_crtc *crtc, u32 ch)
+static void ade_ctran_disable(struct ade_crtc *acrtc, u32 ch)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u8 x;
 
 	switch (ch) {
@@ -859,15 +861,15 @@ static void ade_ctran_disable(struct hisi_crtc *crtc, u32 ch)
 	
 
 	writel(1, base + ADE_CTRAN_DIS(x));
-	//writel(1, base + ADE_CTRAN_CFG_OK(x));
-	crtc->use_mask &= ~BIT(ADE_CTRAN_BIT_OFST + x);
+	
+	acrtc->use_mask &= ~BIT(ADE_CTRAN_BIT_OFST + x);
 }
 
-static void ade_overlay_set(struct hisi_crtc *crtc, u8 ch, u8 zpos,
+static void ade_overlay_set(struct ade_crtc *acrtc, u8 ch, u8 zpos,
 			    u32 x0, u32 y0, u32 in_w, u32 in_h)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u8 ovly_ch = zpos;
 	u8 x = ADE_OVLY2;
 	u32 x1 = x0 + in_w - 1;
@@ -905,17 +907,17 @@ static void ade_overlay_set(struct hisi_crtc *crtc, u8 ch, u8 zpos,
 
 	/* when primary is enable, indicate that it's ready to output. */
 	if (ch == PRIMARY_CH) {
-		  val = (in_w - 1 ) << 16 | (in_h - 1);
-		  writel(val, base + ADE_OVLY_OUTPUT_SIZE(x));
-		  writel(1, base + ADE_OVLYX_CTL(x));
-		  crtc->use_mask |= BIT(ADE_OVLY_BIT_OFST + x);
+		val = (in_w - 1 ) << 16 | (in_h - 1);
+		writel(val, base + ADE_OVLY_OUTPUT_SIZE(x));
+		writel(1, base + ADE_OVLYX_CTL(x));
+		acrtc->use_mask |= BIT(ADE_OVLY_BIT_OFST + x);
 	}
 }
 
-static void ade_overlay_disable(struct hisi_crtc *crtc, u32 ch, u8 zpos)
+static void ade_overlay_disable(struct ade_crtc *acrtc, u32 ch, u8 zpos)
 {
-	struct ade_context *ctx = crtc->ctx;
-	void __iomem *base = ctx->base;
+	struct hisi_ade *ade = acrtc->ade;
+	void __iomem *base = ade->ctx.base;
 	u8 ovly_ch = zpos;
 	u32 val;
 
@@ -923,76 +925,68 @@ static void ade_overlay_disable(struct hisi_crtc *crtc, u32 ch, u8 zpos)
 	DRM_DEBUG_DRIVER("ch%d_ctl=0x%X\n", ovly_ch+1, val);
 	writel(val, base + ADE_OVLY_CH_CTL(ovly_ch));
 	val = ~(0x3 << (ovly_ch * 4)) & readl(base + ADE_OVLY_CTL);
+
 	DRM_DEBUG_DRIVER("ovly_ctl=0x%X\n", val);
 	writel(val, base + ADE_OVLY_CTL);
 
 	if (ch == ADE_DISP)
 		writel(0, base + ADE_CTRAN5_TRANS_CFG);
+
 }
 
-static void ade_update_channel(struct hisi_plane *plane, struct hisi_crtc *crtc,
+static void ade_update_channel(struct hisi_plane *hplane, struct ade_crtc *acrtc,
 			  struct drm_framebuffer *fb, int crtc_x, int crtc_y,
 			  unsigned int crtc_w, unsigned int crtc_h,
 			  uint32_t src_x, uint32_t src_y,
 			  uint32_t src_w, uint32_t src_h)
 {
-	struct drm_plane_state	*state = plane->base.state;
+	struct drm_plane_state  *state = hplane->base.state;
 	struct hisi_plane_state *hstate = to_hisi_plane_state(state);
-	u8 ch = plane->ch;
+	u8 ch = hplane->ch;
 	u8 zpos = hstate->zpos;
-	u8 alpha = hstate->alpha;
-	u32 blending = hstate->blending;
-	u32 rotation = state->rotation;
 	u32 fmt = ade_get_format(fb->pixel_format);
 	u32 in_w;
 	u32 in_h;
 	u32 out_w;
 	u32 out_h;
 
-	DRM_DEBUG_DRIVER("channel%d: src:(%d, %d)-%dx%d, crtc:(%d, %d)-%dx%d, "
-			"zpos=%d, alpha=%d, blending=0x%x, rotation=%d\n",
-			ch+1, src_x, src_y, src_w, src_h,
-			crtc_x, crtc_y, crtc_w, crtc_h,
-			zpos, alpha, blending, rotation);
-
 	/* 1) DMA setting */
 	in_w = src_w;
 	in_h = src_h;
-	ade_rdma_set(crtc, fb, ch, src_x, src_y, in_w, in_h, fmt);
+	ade_rdma_set(acrtc, fb, ch, src_x, src_y, in_w, in_h, fmt);
 
 	/* 2) clip setting */
 	out_w = crtc_w;
 	out_h = crtc_h;
-	ade_clip_set(crtc, ch, in_w, in_h, &out_w, &out_h);
+	ade_clip_set(acrtc, ch, in_w, in_h, &out_w, &out_h);
 
 	/* 3) scale setting */
 	in_w = out_w;
 	in_h = out_h;
 	out_w = crtc_w;
 	out_h = crtc_h;
-	ade_scale_set(crtc, ch, in_w, in_h, &out_w, &out_h);
+	ade_scale_set(acrtc, ch, in_w, in_h, &out_w, &out_h);
 
 	/* 4) ctran/csc setting */
 	in_w = out_w;
 	in_h = out_h;
-	ade_ctran_set(crtc, ch, in_w, in_h, fmt);
+	ade_ctran_set(acrtc, ch, in_w, in_h, fmt);
 
 	/* 5) overlay routing setting */
-	ade_overlay_set(crtc, ch, zpos, crtc_x, crtc_y, in_w, in_h);
+	ade_overlay_set(acrtc, ch, zpos, crtc_x, crtc_y, in_w, in_h);
 
-	crtc->ch_mask |= BIT(ch);
+	acrtc->ch_mask |= BIT(ch);
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-static void ade_disable_channel(struct hisi_plane *plane, struct hisi_crtc *crtc)
+static void ade_disable_channel(struct hisi_plane *hplane, struct ade_crtc *acrtc)
 {
-	struct drm_plane_state	*state = plane->base.state;
+	struct drm_plane_state  *state = hplane->base.state;
 	struct hisi_plane_state *hstate = to_hisi_plane_state(state);
-	u32 ch = plane->ch;
+	u32 ch = hplane->ch;
 	u8 zpos = hstate->zpos;
 
 	DRM_DEBUG_DRIVER("disable channel%d\n", ch+1);
-
 	/* reset state */
 	state->rotation = BIT(DRM_ROTATE_0);
 	hstate->zpos = ch;
@@ -1005,86 +999,46 @@ static void ade_disable_channel(struct hisi_plane *plane, struct hisi_crtc *crtc
 		return;
 
 	/* disable read DMA */
-	ade_rdma_disable(crtc, ch);
+	ade_rdma_disable(acrtc, ch);
 
 	/* disable clip */
-	ade_clip_disable(crtc, ch);
+	ade_clip_disable(acrtc, ch);
 
 	/* disable scale */
-	ade_scale_disable(crtc, ch);
+	ade_scale_disable(acrtc, ch);
 
 	/* disable ctran */
-	ade_ctran_disable(crtc, ch);
+	ade_ctran_disable(acrtc, ch);
 
 	/* disable overlay routing */
-	ade_overlay_disable(crtc, ch, zpos);
+	ade_overlay_disable(acrtc, ch, zpos);
 
-	crtc->ch_mask &= ~BIT(ch);
+	acrtc->ch_mask &= ~BIT(ch);
 	DRM_DEBUG_DRIVER("exit success.\n");
 }
 
-void hisi_plane_destroy(struct drm_plane *p)
-{
-	struct hisi_plane *plane = to_hisi_plane(p);
-
-	drm_plane_cleanup(p);
-	devm_kfree(p->dev->dev, plane);
-}
-
-int hisi_plane_prepare_fb(struct drm_plane *p,
-				struct drm_framebuffer *fb,
-				const struct drm_plane_state *new_state)
+void ade_plane_atomic_update(struct hisi_plane *hplane,
+			     struct drm_plane_state *old_state)
 {
-	DRM_DEBUG_DRIVER("enter.\n");
-	DRM_DEBUG_DRIVER("exit success.\n");
-	return 0;
-}
-
-void hisi_plane_cleanup_fb(struct drm_plane *p,
-				struct drm_framebuffer *fb,
-				const struct drm_plane_state *old_state)
-{
-	DRM_DEBUG_DRIVER("enter.\n");
-	DRM_DEBUG_DRIVER("exit success.\n");
-}
-
-int hisi_plane_atomic_check(struct drm_plane *p,
-				     struct drm_plane_state *state)
-{
-	DRM_DEBUG_DRIVER("enter.\n");
-	DRM_DEBUG_DRIVER("exit success.\n");
-	return 0;
-}
+	struct drm_plane *plane = &hplane->base;
+	struct drm_plane_state	*state	= plane->state;
+	struct ade_crtc *acrtc;
 
-void hisi_plane_atomic_update(struct drm_plane *p,
-				       struct drm_plane_state *old_state)
-{
-	struct hisi_plane *plane = to_hisi_plane(p);
-	struct drm_plane_state	*state	= p->state;
-	struct hisi_crtc *crtc;
-
-	if (!state->crtc)
-		return;
-
-	crtc = to_ade_crtc(state->crtc);
-	ade_update_channel(plane, crtc, state->fb,
+	acrtc = to_ade_crtc(state->crtc);
+	ade_update_channel(hplane, acrtc, state->fb,
 		      state->crtc_x, state->crtc_y,
 		      state->crtc_w, state->crtc_h,
 		      state->src_x >> 16, state->src_y >> 16,
 		      state->src_w >> 16, state->src_h >> 16);
 }
 
-void hisi_plane_atomic_disable(struct drm_plane *p,
+void hisi_ade_plane_atomic_disable(struct hisi_plane *hplane,
 			       struct drm_plane_state *old_state)
 {
-	struct hisi_plane *plane = to_hisi_plane(p);
-	struct hisi_crtc *crtc;
-
-	if (!old_state->crtc)
-		return;
+	struct ade_crtc *crtc;
 
 	crtc = to_ade_crtc(old_state->crtc);
-	ade_disable_channel(plane, crtc);
+	ade_disable_channel(hplane, crtc);
 }
 
 #define ADE_CHANNEL_SCALE_UNSUPPORT 0
@@ -1111,13 +1065,12 @@ static const struct drm_prop_enum_list ade_rotation_enum_list[] = {
 };
 
 int ade_install_plane_properties(struct drm_device *dev,
-					struct hisi_plane *plane)
+					struct hisi_plane *hplane)
 {
 	struct hisi_drm_private *priv = dev->dev_private;
-	struct drm_mode_object *obj = &plane->base.base;
-	struct ade_context *ctx = plane->ctx;
+	struct drm_mode_object *obj = &hplane->base.base;
 	struct drm_property *prop;
-	u8 ch = plane->ch;
+	u8 ch = hplane->ch;
 	u64 prop_val;
 
 	/*
@@ -1152,8 +1105,7 @@ int ade_install_plane_properties(struct drm_device *dev,
 	 */
 	prop = priv->cap_rot_prop;
 	if (!prop) {
-		prop = drm_property_create_bitmask(dev, DRM_MODE_PROP_IMMUTABLE,
-				"cap_rot",
+		prop = drm_property_create_bitmask(dev, 0, "cap_rot",
 				ade_rotation_enum_list,
 				ARRAY_SIZE(ade_rotation_enum_list),
 				BIT(DRM_ROTATE_0) | BIT(DRM_ROTATE_90) |
@@ -1226,7 +1178,8 @@ int ade_install_plane_properties(struct drm_device *dev,
 	 */
 	prop = priv->blending_prop;
 	if (!prop) {
-		prop = drm_property_create_enum(dev, 0,	"blending",
+		prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE,
+				"blending",
 				ade_ch_blending_enum_list,
 				ARRAY_SIZE(ade_ch_blending_enum_list));
 		if (!prop)
@@ -1240,45 +1193,67 @@ int ade_install_plane_properties(struct drm_device *dev,
 
 }
 
+static struct hisi_crtc_ops hisi_ade_crtc_ops = {
+	.enable = ade_crtc_enable,
+	.disable = ade_crtc_disable,
+	.mode_prepare = ade_crtc_mode_prepare,
+	.mode_fixup = ade_crtc_mode_fixup,
+	.mode_set_nofb = ade_crtc_mode_set_nofb,
+	.atomic_begin = ade_crtc_atomic_begin,
+	.atomic_flush = ade_crtc_atomic_flush,
+};
+
+static struct hisi_plane_funcs hisi_ade_plane_ops = {
+	.get_properties = ade_get_channel_formats,
+	.install_properties = ade_install_plane_properties,
+	.atomic_update = ade_plane_atomic_update,
+	.atomic_disable = hisi_ade_plane_atomic_disable,
+};
+
 static int hisi_ade_bind(struct device *dev, struct device *master,
 							void *data)
 {
-	struct hisi_plane *plane;
-	struct hisi_crtc *crtc;
-	enum drm_plane_type type;
-	struct ade_context *ctx = dev_get_drvdata(dev);
-	const u32 *fmts;
-	u32 fmts_cnt;
+	struct hisi_ade *ade = dev_get_drvdata(dev);
+	struct hisi_plane *hplane;
 	int ret = 0;
 	int i;
 	
-	ctx->dev = data;
-	
+	ade->dev = data;
+
 	/* plane init */
-	for (i=0; i<ADE_CH_NUM; i++) {
-		type = i == PRIMARY_CH ? DRM_PLANE_TYPE_PRIMARY :
-			DRM_PLANE_TYPE_OVERLAY;
-		fmts_cnt = ade_get_channel_formats(i, &fmts);
-		plane = hisi_drm_plane_init(ctx->dev, ctx, i, fmts, fmts_cnt, type);
-		if (IS_ERR(plane))
-			return PTR_ERR(plane);
-
-		ctx->plane[i] = plane;
+	for (i = 0; i < ADE_CH_NUM; i++) {
+		hplane = &ade->hplane[i];
+		hplane->ch = i;
+		hplane->ctx = &ade->ctx;
+		hplane->ops = &hisi_ade_plane_ops;
+
+		if(i == PRIMARY_CH){
+			ret = hisi_drm_plane_init(ade->dev, hplane,
+							DRM_PLANE_TYPE_PRIMARY);
+			if (ret)
+				return ret;
+		} else {
+			ret = hisi_drm_plane_init(ade->dev, hplane,
+							DRM_PLANE_TYPE_OVERLAY);
+			if (ret)
+				return ret;
+		
+		}
 	}
 
-	crtc = hisi_drm_crtc_create(ctx->dev, ctx, &ctx->plane[PRIMARY_CH]->base);
-	if (IS_ERR(crtc)) {
-		DRM_ERROR("failed to crtc creat\n");
-		return PTR_ERR(crtc);
-	}
+	/* crtc init */
+	ade->acrtc.ade = ade;
+	ade->acrtc.base.ops = &hisi_ade_crtc_ops;
+
+	ret = hisi_drm_crtc_init(ade->dev, &ade->acrtc.base,
+				&ade->hplane[PRIMARY_CH].base);
+	if (ret)
+		return ret;
 
 	/* ldi irq install */
-	ret = drm_irq_install(ctx->dev, ctx->irq);
-	if (ret) {
-		DRM_ERROR("failed to install IRQ handler\n");
+	ret = drm_irq_install(ade->dev, ade->ctx.irq);
+	if (ret)
 		return ret;
-	}
-	
 	return ret;
 
 }
@@ -1296,25 +1271,25 @@ static const struct component_ops hisi_ade_ops = {
 
 static int hisi_ade_probe(struct platform_device *pdev)
 {
-	struct ade_context *ctx;
+	struct hisi_ade *ade;
 	int ret;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
-	if (!ctx) {
+	ade = devm_kzalloc(&pdev->dev, sizeof(*ade), GFP_KERNEL);
+	if (!ade) {
 		DRM_ERROR("failed to alloc the space\n");
 		return -ENOMEM;
 	}
 
-	ret = hisi_drm_ade_dts_parse(pdev, ctx);
+	ret = hisi_ade_dts_parse(pdev, &ade->ctx);
 	if (ret) {
 		DRM_ERROR("failed to dts parse\n");
 		return ret;
 	}
 	
-	platform_set_drvdata(pdev, ctx);
-	
+	platform_set_drvdata(pdev, ade);
+
 	return component_add(&pdev->dev, &hisi_ade_ops);
 	
 	DRM_DEBUG_DRIVER("drm_ade exit successfully.\n");
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade.h b/drivers/gpu/drm/hisilicon/hisi_ade.h
index fa50a9043c587e..d37b4fa94d6aa2 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade.h
+++ b/drivers/gpu/drm/hisilicon/hisi_ade.h
@@ -13,57 +13,6 @@
 #ifndef __HISI_DRM_ADE_H__
 #define __HISI_DRM_ADE_H__
 
-struct hisi_plane {
-	struct drm_plane base;
-	void *ctx;
-	u8 ch;
-};
-
-struct hisi_crtc {
-	struct drm_crtc base;
-	void *ctx;
-	struct drm_display_mode *dmode;
-	bool enable;
-	u32 ch_mask;
-	u64 use_mask;
-};
-
-void hisi_crtc_atomic_flush(struct drm_crtc *c);
-void hisi_crtc_atomic_begin(struct drm_crtc *c);
-void hisi_drm_crtc_mode_set_nofb(struct drm_crtc *c);
-bool hisi_drm_crtc_mode_fixup(struct drm_crtc *c,
-				      const struct drm_display_mode *mode,
-				      struct drm_display_mode *adj_mode);
-void hisi_drm_crtc_mode_prepare(struct drm_crtc *c);
-void hisi_crtc_disable(struct drm_crtc *c);
-void hisi_crtc_enable(struct drm_crtc *c);
-void hisi_drm_crtc_destroy(struct drm_crtc *c);
-struct hisi_crtc *hisi_drm_crtc_create(struct drm_device  *dev,
-						  void *ctx,
-						  struct drm_plane *p);
-
-void hisi_plane_atomic_disable(struct drm_plane *p,
-			       struct drm_plane_state *old_state);
-void hisi_plane_atomic_update(struct drm_plane *p,
-				       struct drm_plane_state *old_state);
-int hisi_plane_atomic_check(struct drm_plane *p,
-				     struct drm_plane_state *state);
-void hisi_plane_cleanup_fb(struct drm_plane *p,
-				struct drm_framebuffer *fb,
-				const struct drm_plane_state *old_state);
-void hisi_plane_cleanup_fb(struct drm_plane *p,
-				struct drm_framebuffer *fb,
-				const struct drm_plane_state *old_state);
-int hisi_plane_prepare_fb(struct drm_plane *p,
-				struct drm_framebuffer *fb,
-				const struct drm_plane_state *new_state);
-void hisi_plane_destroy(struct drm_plane *p);
-int ade_install_plane_properties(struct drm_device *dev,
-					struct hisi_plane *plane);
-
-extern int hisi_drm_ade_init(void);
-extern void hisi_drm_ade_exit(void);
-
 extern int hisi_drm_enable_vblank(struct drm_device *dev, int crtc);
 extern void hisi_drm_disable_vblank(struct drm_device *dev, int crtc);
 
diff --git a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
index 683a998b682b00..2daf0c2d789b3b 100644
--- a/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
+++ b/drivers/gpu/drm/hisilicon/hisi_ade_reg.h
@@ -10,8 +10,8 @@
  *
  */
 
-#ifndef __HISI_ADE_H__
-#define __HISI_ADE_H__
+#ifndef __HISI_ADE_REG_H__
+#define __HISI_ADE_REG_H__
 
 /********** ADE Register Offset ***********/
 #define ADE_CTRL                (0x4)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
index 2e25486ee31dcb..9e37bebb67af34 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.c
@@ -12,30 +12,33 @@
 
 #include <linux/io.h>
 #include <linux/types.h>
+#include <video/videomode.h>
+
 #include <drm/drmP.h>
 #include <drm/drm_crtc_helper.h>
-#include <video/videomode.h>
 #include <drm/drm_encoder_slave.h>
 #include <drm/drm_atomic_helper.h>
 
-#include "hisi_drm_encoder.h"
 #include "hisi_drm_drv.h"
+#include "hisi_drm_encoder.h"
+#include "hisi_drm_connector.h"
 
-#define get_hisi_connector(connector) \
+#define to_hisi_connector(connector) \
 	container_of(connector, struct hisi_connector, connector)
 
 int hisi_drm_connector_mode_valid(struct drm_connector *connector,
 					  struct drm_display_mode *mode)
 {
-	struct hisi_connector *hisi_connector = get_hisi_connector(connector);
-	struct drm_encoder *encoder = hisi_connector->encoder;
+	struct hisi_connector *hconnector = to_hisi_connector(connector);
+	struct drm_encoder *encoder = hconnector->encoder;
+	struct hisi_connector_funcs *ops = hconnector->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 	int ret = MODE_OK;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	if (hisi_connector->ops->modes_valid)
-		hisi_connector->ops->modes_valid(connector);
+	if (ops->modes_valid)
+		ops->modes_valid(connector);
 
 	if (sfuncs && sfuncs->mode_valid) {
 		ret = sfuncs->mode_valid(encoder, mode);
@@ -50,8 +53,8 @@ int hisi_drm_connector_mode_valid(struct drm_connector *connector,
 struct drm_encoder *
 hisi_drm_best_encoder(struct drm_connector *connector)
 {
-	struct hisi_connector *hisi_connector = get_hisi_connector(connector);
-	struct drm_encoder *encoder = hisi_connector->encoder;
+	struct hisi_connector *hconnector = to_hisi_connector(connector);
+	struct drm_encoder *encoder = hconnector->encoder;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 	DRM_DEBUG_DRIVER("exit success.\n");
@@ -61,9 +64,8 @@ hisi_drm_best_encoder(struct drm_connector *connector)
 
 int hisi_drm_get_modes(struct drm_connector *connector)
 {
-	struct hisi_connector *hisi_connector = get_hisi_connector(connector);
-	struct drm_encoder *encoder = hisi_connector->encoder;
-	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
+	struct hisi_connector *hconnector = to_hisi_connector(connector);
+	struct hisi_connector_funcs *ops = hconnector->ops;
 	int count = 0;
 
 	DRM_DEBUG_DRIVER("enter.\n");
@@ -72,8 +74,8 @@ int hisi_drm_get_modes(struct drm_connector *connector)
 	if (sfuncs && sfuncs->get_modes)
 		count = sfuncs->get_modes(encoder, connector);
 #else
-	if (hisi_connector->ops->get_modes)
-		count += hisi_connector->ops->get_modes(connector);
+	if (ops->get_modes)
+		count += ops->get_modes(connector);
 #endif
 
 
@@ -97,15 +99,16 @@ void hisi_drm_connector_destroy(struct drm_connector *connector)
 enum drm_connector_status
 hisi_drm_detect(struct drm_connector *connector, bool force)
 {
-	struct hisi_connector *hisi_connector = get_hisi_connector(connector);
-	struct drm_encoder *encoder = hisi_connector->encoder;
+	struct hisi_connector *hconnector = to_hisi_connector(connector);
+	struct drm_encoder *encoder = hconnector->encoder;
+	struct hisi_connector_funcs *ops = hconnector->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 	enum drm_connector_status status = connector_status_unknown;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	if (hisi_connector->ops->detect)
-		hisi_connector->ops->detect(connector);
+	if (ops->detect)
+		ops->detect(connector);
 
 	if (sfuncs && sfuncs->detect)
 		status = sfuncs->detect(encoder, connector);
@@ -113,6 +116,7 @@ hisi_drm_detect(struct drm_connector *connector, bool force)
 	DRM_DEBUG_DRIVER("exit success. status=%d\n", status);
 	return status;
 }
+
 static struct drm_connector_funcs hisi_drm_connector_funcs = {
 	.dpms = drm_atomic_helper_connector_dpms,
 	.fill_modes = drm_helper_probe_single_connector_modes,
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
index a6527557451c68..e78c48559c2edc 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_connector.h
@@ -13,6 +13,19 @@
 #ifndef __HISI_DRM_CONNECTOR_H__
 #define __HISI_DRM_CONNECTOR_H__
 
+struct hisi_connector_funcs {
+	enum drm_connector_status (*detect)
+					(struct drm_connector *connector);
+	int (*get_modes)(struct drm_connector *connector);
+	int (*modes_valid)(struct drm_connector *connector);
+};
+
+struct hisi_connector {
+	struct drm_connector connector;
+	struct drm_encoder *encoder;
+	void *ops;
+};
+
 void hisi_drm_connector_init(struct drm_device *dev, struct drm_encoder *encoder,
 							struct drm_connector *connector);
 
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
index dce9d2bd56e6e1..023ebdf7fa3180 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.c
@@ -11,18 +11,100 @@
  */
 
 #include <drm/drmP.h>
-
 #include <drm/drm_crtc.h>
 #include <drm/drm_crtc_helper.h>
-#include <drm/drm_encoder_slave.h>
 #include <drm/drm_atomic_helper.h>
 
 #include "hisi_drm_drv.h"
+#include "hisi_drm_plane.h"
+#include "hisi_drm_crtc.h"
 #include "hisi_ade.h"
 
+#define to_hisi_crtc(c)		container_of(c, struct hisi_crtc, base)
+
+static void  hisi_drm_crtc_enable(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (hcrtc->enable)
+		return;
+
+	if (ops->enable)
+		ops->enable(hcrtc);
+	drm_crtc_vblank_on(crtc);
+
+	hcrtc->enable = true;
+}
+
+static void hisi_drm_crtc_disable(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (!hcrtc->enable)
+		return;
+
+	drm_crtc_vblank_off(crtc);
+	if (ops->disable)
+		ops->disable(hcrtc);
+
+	hcrtc->enable = false;
+}
+
+static void hisi_drm_crtc_mode_prepare(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (ops->mode_prepare)
+		ops->mode_prepare(hcrtc);
+}
+
+static bool hisi_drm_crtc_mode_fixup(struct drm_crtc *crtc,
+			      const struct drm_display_mode *mode,
+			      struct drm_display_mode *adj_mode)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+	bool ret = true;
+
+	if (ops->mode_fixup)
+		ret = ops->mode_fixup(hcrtc, mode, adj_mode);
+
+	return ret;
+}
+
+static void hisi_drm_crtc_mode_set_nofb(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (ops->mode_set_nofb)
+		ops->mode_set_nofb(hcrtc);
+}
+
+static void hisi_crtc_atomic_begin(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (ops->atomic_begin)
+		ops->atomic_begin(hcrtc);
+}
+
+static void hisi_crtc_atomic_flush(struct drm_crtc *crtc)
+{
+	struct hisi_crtc *hcrtc = to_hisi_crtc(crtc);
+	struct hisi_crtc_ops *ops = hcrtc->ops;
+
+	if (ops->atomic_flush)
+		ops->atomic_flush(hcrtc);
+}
+
 static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
-	.enable		= hisi_crtc_enable,
-	.disable	= hisi_crtc_disable,
+	.enable		= hisi_drm_crtc_enable,
+	.disable	= hisi_drm_crtc_disable,
 	.prepare	= hisi_drm_crtc_mode_prepare,
 	.mode_fixup	= hisi_drm_crtc_mode_fixup,
 	.mode_set_nofb	= hisi_drm_crtc_mode_set_nofb,
@@ -30,6 +112,11 @@ static const struct drm_crtc_helper_funcs crtc_helper_funcs = {
 	.atomic_flush	= hisi_crtc_atomic_flush,
 };
 
+static void hisi_drm_crtc_destroy(struct drm_crtc *c)
+{
+	drm_crtc_cleanup(c);
+}
+
 static const struct drm_crtc_funcs crtc_funcs = {
 	.destroy	= hisi_drm_crtc_destroy,
 	.set_config	= drm_atomic_helper_set_config,
@@ -39,26 +126,23 @@ static const struct drm_crtc_funcs crtc_funcs = {
 	.atomic_destroy_state	= drm_atomic_helper_crtc_destroy_state,
 };
 
-struct hisi_crtc *hisi_drm_crtc_create(struct drm_device  *dev,
-						  void *ctx,
-						  struct drm_plane *p)
+int hisi_drm_crtc_init(struct drm_device *dev,
+		       struct hisi_crtc *hcrtc,
+		       struct drm_plane *plane)
 {
-	struct hisi_crtc *crtc;
-	struct hisi_drm_private *private = dev->dev_private;
+	struct hisi_drm_private *priv = dev->dev_private;
 	int ret;
 
-	crtc = devm_kzalloc(dev->dev, sizeof(*crtc), GFP_KERNEL);
-	if (!crtc)
-		return ERR_PTR(-ENOMEM);
-
-	ret = drm_crtc_init_with_planes(dev, &crtc->base, p,
+	ret = drm_crtc_init_with_planes(dev, &hcrtc->base, plane,
 					NULL, &crtc_funcs);
-	if (ret)
-		return ERR_PTR(ret);
+	if (ret) {
+		DRM_ERROR("failed to init crtc.\n");
+		return ret;
+	}
 
-	drm_crtc_helper_add(&crtc->base, &crtc_helper_funcs);
+	drm_crtc_helper_add(&hcrtc->base, &crtc_helper_funcs);
 
-	private->crtc = &crtc->base;
-	crtc->ctx = ctx;
-	return crtc;
+	priv->crtc = &hcrtc->base;
+	
+	return 0;
 }
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.h b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.h
index 81ade06a9742da..c5c288245fb380 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_crtc.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_crtc.h
@@ -12,9 +12,28 @@
 
 #ifndef __HISI_DRM_CRTC_H__
 #define __HISI_DRM_CRTC_H__
-#include "hisi_handle.h"
 
-struct hisi_crtc *hisi_drm_crtc_init (struct drm_device *drm_dev,
-	struct hisi_handle *hisi_handle, struct drm_plane *p);
+struct hisi_crtc {
+	struct drm_crtc base;
+	void *ops;
+	bool enable;
+};
+
+struct hisi_crtc_ops {
+	void (*disable)(struct hisi_crtc *hcrtc);
+	void (*enable)(struct hisi_crtc *hcrtc);
+	void (*mode_prepare)(struct hisi_crtc *hcrtc);
+	bool (*mode_fixup)(struct hisi_crtc *hcrtc,
+			   const struct drm_display_mode *mode,
+			   struct drm_display_mode *adj_mode);
+	void (*mode_set_nofb)(struct hisi_crtc *hcrtc);
+	void (*atomic_begin)(struct hisi_crtc *hcrtc);
+	void (*atomic_flush)(struct hisi_crtc *hcrtc);
+	void (*destroy)(struct hisi_crtc *hcrtc);
+};
+
+extern int hisi_drm_crtc_init(struct drm_device *dev,
+		       struct hisi_crtc *crtc,
+		       struct drm_plane *plane);
 
 #endif
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
index 0e7ad0d89f786c..fceca1d495d191 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.c
@@ -1,4 +1,5 @@
 /*
+#endif
  * Hisilicon Terminal SoCs drm driver
  *
  * Copyright (c) 2014-2015 Hisilicon Limited.
@@ -10,27 +11,26 @@
  *
  */
 
-#include <drm/drmP.h>
-
-#include <linux/component.h>
-#include <linux/debugfs.h>
-#include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/debugfs.h>
 #include <linux/of_platform.h>
+#include <linux/component.h>
 
+#include <drm/drmP.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_crtc_helper.h>
+#include <drm/drm_atomic_helper.h>
 #include <drm/drm_encoder_slave.h>
 #include <drm/drm_gem_cma_helper.h>
 #include <drm/drm_fb_cma_helper.h>
-#include <drm/drm_atomic_helper.h>
 
-#ifdef CONFIG_DRM_HISI_FBDEV
-#include "hisi_drm_fbdev.h"
-#endif
 #include "hisi_drm_drv.h"
 #include "hisi_drm_fb.h"
 #include "hisi_ade.h"
+#ifdef CONFIG_DRM_HISI_FBDEV
+#include "hisi_drm_fbdev.h"
+#endif
 
 #define DRIVER_NAME	"hisi-drm"
 
@@ -67,8 +67,8 @@ static int hisi_drm_load(struct drm_device *dev, unsigned long flags)
 	struct hisi_drm_private *priv;
 	int ret;
 
-	/* debug setting */
-	drm_debug = DRM_UT_DRIVER;
+	/* debug setting
+	drm_debug = DRM_UT_DRIVER|DRM_UT_KMS; */
 	DRM_DEBUG_DRIVER("enter.\n");
 
 	priv = devm_kzalloc(dev->dev, sizeof(*priv), GFP_KERNEL);
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_drv.h b/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
index 3f215dcb9390a2..3e2d49774d866a 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_drv.h
@@ -13,36 +13,6 @@
 #ifndef __HISI_DRM_DRV_H__
 #define __HISI_DRM_DRV_H__
 
-struct hisi_encoder_funcs {
-	void (*destroy)(struct drm_encoder *encoder);
-	bool (*mode_fixup)(struct drm_encoder *encoder,
-				const struct drm_display_mode *mode,
-				struct drm_display_mode *adjusted_mode);
-	void (*mode_set)(struct drm_encoder *encoder,
-					struct drm_display_mode *mode,
-					struct drm_display_mode *adjusted_mode);
-	void (*enable)(struct drm_encoder *encoder);
-	void (*disable)(struct drm_encoder *encoder);
-};
-
-struct hisi_encoder {
-	struct drm_encoder_slave base;
-	struct hisi_encoder_funcs *ops;
-};
-
-struct hisi_connector_funcs {
-	enum drm_connector_status (*detect)
-					(struct drm_connector *connector);
-	int (*get_modes)(struct drm_connector *connector);
-	int (*modes_valid)(struct drm_connector *connector);
-};
-
-struct hisi_connector {
-	struct drm_connector connector;
-	struct drm_encoder *encoder;
-	struct hisi_connector_funcs *ops;
-};
-
 struct hisi_drm_private {
 	struct hisi_drm_fbdev	*fbdev;
 	struct drm_crtc		*crtc;
@@ -51,27 +21,10 @@ struct hisi_drm_private {
 	struct drm_property *zpos_prop;
 	struct drm_property *alpha_prop;
 	struct drm_property *blending_prop;
-
+	
 	/* read only capabilities properties */
 	struct drm_property *cap_scl_prop; /* 0: unsupport, 1: support */
 	struct drm_property *cap_rot_prop;  /*  */
 };
 
-enum {
-	/* no blending */
-	ALPHA_BLENDING_NONE     = 0x0100,
-	/* ONE / ONE_MINUS_SRC_ALPHA */
-	ALPHA_BLENDING_PREMULT  = 0x0105,
-	/* SRC_ALPHA / ONE_MINUS_SRC_ALPHA */
-	ALPHA_BLENDING_COVERAGE = 0x0405
-};
-
-/* plane structs  */
-struct hisi_plane_state {
-	struct drm_plane_state base;
-	u8 zpos;  /* z order */
-	u8 alpha; /* Alpha value applied to the whole plane */
-	u32 blending; /* blending cases: none, premult and coverage */
-};
-
 #endif /* __HISI_DRM_DRV_H__ */
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
index 623054792e0d64..39e67f69f10b1e 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_dsi.c
@@ -10,40 +10,40 @@
  *
  */
 
-#include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/component.h>
 #include <linux/types.h>
-
+#include <linux/of_device.h>
 #include <video/mipi_display.h>
 #include <video/videomode.h>
 
 #include <drm/drmP.h>
-#include <drm/drm_crtc_helper.h>
 #include <drm/drm_mipi_dsi.h>
-#include <drm/drm_fb_helper.h>
+#include <drm/drm_crtc_helper.h>
 #include <drm/drm_encoder_slave.h>
 #include <drm/drm_atomic_helper.h>
+#include <drm/drm_fb_helper.h>
 
-#ifdef CONFIG_DRM_HISI_FBDEV
-#include "hisi_drm_fbdev.h"
-#endif
 #include "hisi_drm_drv.h"
 #include "hisi_drm_encoder.h"
 #include "hisi_drm_connector.h"
-#include "hisi_ade.h"
 #include "hisi_dsi_reg.h"
+#ifdef CONFIG_DRM_HISI_FBDEV
+#include "hisi_drm_fbdev.h"
+#endif
 
 #define encoder_to_dsi(encoder) \
-	container_of(encoder, struct hisi_drm_dsi, hisi_encoder.base.base)
+	container_of(encoder, struct hisi_dsi, hisi_encoder.base.base)
 
 #define DEFAULT_MIPI_CLK_RATE   19200000
-#define MAX_TX_ESC_CLK    (10)
+#define MAX_TX_ESC_CLK		   (10)
+#define DSI_24BITS_1               (5)
+#define DSI_NON_BURST_SYNC_PULSES  (0)
 #define DSI_BURST_MODE    DSI_NON_BURST_SYNC_PULSES
 #define ROUND(x, y) ((x) / (y) + ((x) % (y) * 10 / (y) >= 5 ? 1 : 0))
 
 #define DEFAULT_MIPI_CLK_PERIOD_PS (1000000000 / (DEFAULT_MIPI_CLK_RATE / 1000))
-
+#if 0
 enum {
 	DSI_16BITS_1 = 0,
 	DSI_16BITS_2,
@@ -54,14 +54,13 @@ enum {
 	DSI_24BITS_2,
 	DSI_24BITS_3,
 };
-
 enum {
 	DSI_NON_BURST_SYNC_PULSES = 0,
 	DSI_NON_BURST_SYNC_EVENTS,
 	DSI_BURST_SYNC_PULSES_1,
 	DSI_BURST_SYNC_PULSES_2
 };
-
+#endif 
 struct mipi_dsi_phy_register {
 	u32 clk_t_lpx;
 	u32 clk_t_hs_prepare;
@@ -98,27 +97,31 @@ struct mipi_dsi_phy_register {
 	u32 burst_mode;
 };
 
-struct hisi_drm_dsi {
+struct hisi_dsi {
 	struct hisi_encoder hisi_encoder;
 	struct hisi_connector hisi_connector;
+	struct mipi_dsi_phy_register phyreg;
+	struct videomode vm;
+
+	u32 lanes;
+	u32 format;
+	u32 date_enable_pol;
+	u32 mode_flags;
+	u8 color_mode;
+	void *ctx;
+};
+
+struct hisi_dsi_context {
+	struct hisi_dsi dsi;
 #ifdef CONFIG_DRM_HISI_HAS_SLAVE_ENCODER
 	struct i2c_client *client;
 	struct drm_i2c_encoder_driver *drm_i2c_driver;
 #endif
 	struct clk *dsi_cfg_clk;
-	struct videomode vm;
-	int nominal_pixel_clock_kHz;
 	struct drm_device *dev;
-	struct mipi_dsi_phy_register phyreg;
-
+	
 	void __iomem *base;
-	u8 color_mode;
-
-	u32 lanes;
-	u32 format;
-	u32 date_enable_pol;
-	u32 vc;
-	u32 mode_flags;
+	int nominal_pixel_clock_kHz;
 };
 
 struct dsi_phy_seq_info {
@@ -142,7 +145,7 @@ struct dsi_phy_seq_info dphy_seq_info[] = {
 };
 
 void set_dsi_phy_rate_equal_or_faster(u32 *phy_freq_kHz,
-		struct mipi_dsi_phy_register *phyreg)
+		     struct mipi_dsi_phy_register *phyreg)
 {
 	u32 ui = 0;
 	u32 cfg_clk_ps = DEFAULT_MIPI_CLK_PERIOD_PS;
@@ -307,7 +310,7 @@ void set_dsi_phy_rate_equal_or_faster(u32 *phy_freq_kHz,
 }
 
 static void hisi_dsi_phy_tst_set(void __iomem *base,
-						u32 array, u32 phyreg_data)
+				 u32 array, u32 phyreg_data)
 {
 	writel(array, base +  PHY_TST_CTRL1 );
 	wmb();
@@ -322,9 +325,10 @@ static void hisi_dsi_phy_tst_set(void __iomem *base,
 	writel(0x00000000, base +  PHY_TST_CTRL0 );
 }
 
-int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
+int dsi_mipi_init(struct hisi_dsi *dsi)
 {
-	void __iomem *base = hisi_dsi->base;
+	struct hisi_dsi_context *ctx = dsi->ctx;
+	void __iomem *base = ctx->base;
 
 	u32 i = 0;
 	u32 hline_time = 0;
@@ -336,14 +340,14 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	int tmp, tmp1, val;
 	bool is_ready = false;
 
-	struct mipi_dsi_phy_register *phyreg = &hisi_dsi->phyreg;
+	struct mipi_dsi_phy_register *phyreg = &dsi->phyreg;
 
-	pr_info("%s: lanes %d\n", __func__, hisi_dsi->lanes);
+	pr_info("%s: lanes %d\n", __func__, dsi->lanes);
 
 	/* reset Core */
 	writel( PWR_UP_OFF, base +  PWR_UP );
 
-	writel((hisi_dsi->lanes - 1) | 0x30 << 8 , base +  PHY_IF_CFG );
+	writel((dsi->lanes - 1) | 0x30 << 8 , base +  PHY_IF_CFG );
 	writel(phyreg->clk_division, base +  CLKMGR_CFG );
 
 	writel(0x00000000, base +  PHY_RSTZ );
@@ -367,7 +371,7 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	hisi_dsi_phy_tst_set(base, 0x10014, phyreg->clk_t_wakeup);
 
 	/* data lane */
-	for (i = 0; i < hisi_dsi->lanes; i++) {
+	for (i = 0; i < dsi->lanes; i++) {
 		/* Timing control - TLPX*/
 		hisi_dsi_phy_tst_set(base, (0x10020 + (i << 4)),
 								phyreg->data_t_lpx);
@@ -457,14 +461,15 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	if (!is_ready)
 		DRM_INFO("phystopstateclklane is not ready.\n");
 
-	writel(hisi_dsi->vc, base +  DPI_VCID );
-	writel(hisi_dsi->color_mode, base +  DPI_COLOR_CODING );
-	writel(hisi_dsi->date_enable_pol | 0 << 0x3 | 0 << 0x4 |
-		(hisi_dsi->vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? 0 : 1) << 0x2 |
-		(hisi_dsi->vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ? 0 : 1) << 0x1,
+//	writel(hisi_dsi->vc, base +  DPI_VCID );
+	writel(0, base +  DPI_VCID );
+	writel(dsi->color_mode, base +  DPI_COLOR_CODING );
+	writel(dsi->date_enable_pol | 0 << 0x3 | 0 << 0x4 |
+		(dsi->vm.flags & DISPLAY_FLAGS_HSYNC_HIGH ? 0 : 1) << 0x2 |
+		(dsi->vm.flags & DISPLAY_FLAGS_VSYNC_HIGH ? 0 : 1) << 0x1,
 		base +  DPI_CFG_POL );
 
-	if (hisi_dsi->format == MIPI_DSI_FMT_RGB666)
+	if (dsi->format == MIPI_DSI_FMT_RGB666)
 		writel(1 << 0x09, base +  DPI_COLOR_CODING );
 //		writel(hisi_dsi->color_mode | 1 << 0x09, base +  DPI_COLOR_CODING );
 
@@ -476,24 +481,24 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	 * lane clocks minus hsa, hbp and active.
 	 */
 
-	htot = hisi_dsi->vm.hactive +hisi_dsi->vm.hsync_len +
-		  hisi_dsi->vm.hfront_porch + hisi_dsi->vm.hback_porch;
-	vtot =  hisi_dsi->vm.vactive + hisi_dsi->vm.vsync_len +
-		  hisi_dsi->vm.vfront_porch + hisi_dsi->vm.vback_porch;
+	htot = dsi->vm.hactive +dsi->vm.hsync_len +
+		  dsi->vm.hfront_porch + dsi->vm.hback_porch;
+	vtot = dsi->vm.vactive + dsi->vm.vsync_len +
+		  dsi->vm.vfront_porch + dsi->vm.vback_porch;
 
-	pixel_clk_kHz = hisi_dsi->vm.pixelclock;
+	pixel_clk_kHz = dsi->vm.pixelclock;
 
-	hsa_time = (hisi_dsi->vm.hsync_len * phyreg->lane_byte_clk_kHz) /
+	hsa_time = (dsi->vm.hsync_len * phyreg->lane_byte_clk_kHz) /
 		   pixel_clk_kHz;
-	hbp_time = (hisi_dsi->vm.hback_porch * phyreg->lane_byte_clk_kHz) /
+	hbp_time = (dsi->vm.hback_porch * phyreg->lane_byte_clk_kHz) /
 		   pixel_clk_kHz;
 	hline_time  = (((u64)htot * (u64)phyreg->lane_byte_clk_kHz)) /
 		      pixel_clk_kHz;
-	blc_hactive  = (((u64)hisi_dsi->vm.hactive *
+	blc_hactive  = (((u64)dsi->vm.hactive *
 			(u64)phyreg->lane_byte_clk_kHz)) / pixel_clk_kHz;
 
 /* returns pixel clocks in dsi byte lane times, multiplied by 1000 */
-#define R(x) ((u32)((((u64)(x) * (u64)1000 * (u64)hisi_dsi->vm.pixelclock) / \
+#define R(x) ((u32)((((u64)(x) * (u64)1000 * (u64)dsi->vm.pixelclock) / \
 	      phyreg->lane_byte_clk_kHz)))
 
 	if ((R(hline_time) / 1000) > htot)
@@ -511,57 +516,57 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 		 "hbp=%d, hline=%d", __func__, pixel_clk_kHz,
 		 phyreg->lane_byte_clk_kHz, hsa_time, hbp_time, hline_time);
 
-	if (hisi_dsi->vm.vsync_len > 15)
-		hisi_dsi->vm.vsync_len = 15;
+	if (dsi->vm.vsync_len > 15)
+		dsi->vm.vsync_len = 15;
 
-	writel(hisi_dsi->vm.vsync_len, base +  VID_VSA_LINES );
-	writel(hisi_dsi->vm.vback_porch, base +  VID_VBP_LINES );
-	writel(hisi_dsi->vm.vfront_porch, base +  VID_VFP_LINES );
-	writel(hisi_dsi->vm.vactive, base +  VID_VACTIVE_LINES );
-	writel(hisi_dsi->vm.hactive, base +  VID_PKT_SIZE );
+	writel(dsi->vm.vsync_len, base +  VID_VSA_LINES );
+	writel(dsi->vm.vback_porch, base +  VID_VBP_LINES );
+	writel(dsi->vm.vfront_porch, base +  VID_VFP_LINES );
+	writel(dsi->vm.vactive, base +  VID_VACTIVE_LINES );
+	writel(dsi->vm.hactive, base +  VID_PKT_SIZE );
 
-	refresh_nom = ((u64)hisi_dsi->nominal_pixel_clock_kHz * 1000000) /
+	refresh_nom = ((u64)ctx->nominal_pixel_clock_kHz * 1000000) /
 		      (htot * vtot);
 
-	tmp = 1000000000 / hisi_dsi->vm.pixelclock;
+	tmp = 1000000000 / dsi->vm.pixelclock;
 	tmp1 = 1000000000 / phyreg->lane_byte_clk_kHz;
 
 	pr_info("%s: Pixel clock: %ldkHz (%d.%03dns), "
 		"DSI bytelane clock: %dkHz (%d.%03dns)\n",
-		__func__,hisi_dsi->vm.pixelclock, tmp / 1000, tmp % 1000,
+		__func__,dsi->vm.pixelclock, tmp / 1000, tmp % 1000,
 		phyreg->lane_byte_clk_kHz, tmp1 / 1000, tmp1 % 1000);
 
 	pr_info("%s:       CLK   HACT VACT REFRSH    HTOT   VTOT   HFP     HSA    HBP        VFP VBP VSA\n",
 		__func__);
 
 /* returns pixel clocks in dsi byte lane times, multiplied by 1000 */
-#define R(x) ((u32)((((u64)(x) * (u64)1000 * (u64)hisi_dsi->vm.pixelclock) / \
+#define R(x) ((u32)((((u64)(x) * (u64)1000 * (u64)dsi->vm.pixelclock) / \
 	      phyreg->lane_byte_clk_kHz)))
 
-	refresh_real = ((u64)hisi_dsi->vm.pixelclock * (u64)1000000000) /
+	refresh_real = ((u64)dsi->vm.pixelclock * (u64)1000000000) /
 		      ((u64)R(hline_time) * (u64)vtot);
 
 	pr_info("%s: nom: %6u %4u %4u %2u.%03u  %4u     %4u  %3u     %3u     %3u      %3u %3u  %3u\n",
-		__func__, hisi_dsi->nominal_pixel_clock_kHz,
-		hisi_dsi->vm.hactive, hisi_dsi->vm.vactive,
+		__func__, ctx->nominal_pixel_clock_kHz,
+		dsi->vm.hactive, dsi->vm.vactive,
 		refresh_nom / 1000, refresh_nom % 1000, htot, vtot,
-		hisi_dsi->vm.hfront_porch, hisi_dsi->vm.hsync_len,
-		hisi_dsi->vm.hback_porch,hisi_dsi->vm.vfront_porch,
-		hisi_dsi->vm.vsync_len, hisi_dsi->vm.vback_porch);
+		dsi->vm.hfront_porch, dsi->vm.hsync_len,
+		dsi->vm.hback_porch, dsi->vm.vfront_porch,
+		dsi->vm.vsync_len, dsi->vm.vback_porch);
 
 	pr_info("%s: tru: %6u %4u %4u %2u.%03u  %4u.%03u %4u  %3u.%03u %3u.%03u %3u.%03u  %3u %3u  %3u\n",
-		__func__, (u32)hisi_dsi->vm.pixelclock,
-		hisi_dsi->vm.hactive, hisi_dsi->vm.vactive,
+		__func__, (u32)dsi->vm.pixelclock,
+		dsi->vm.hactive, dsi->vm.vactive,
 		refresh_real / 1000, refresh_real % 1000,
 		R(hline_time) / 1000, R(hline_time) % 1000, vtot,
 		R(hline_time - hbp_time - hsa_time - blc_hactive) / 1000,
 		R(hline_time - hbp_time - hsa_time - blc_hactive) % 1000,
 		R(hsa_time) / 1000, R(hsa_time) % 1000,
 		R(hbp_time) / 1000, R(hbp_time) % 1000,
-		hisi_dsi->vm.vfront_porch,
-		hisi_dsi->vm.vsync_len, hisi_dsi->vm.vback_porch);
+		dsi->vm.vfront_porch,
+		dsi->vm.vsync_len, dsi->vm.vback_porch);
 
-	if (hisi_dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
+	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
 		/*
 		 * we disable this since it affects downstream
 		 * DSI -> HDMI converter output
@@ -592,8 +597,8 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	/* for dsi read */
 	writel(0x0, base +  PCKHDL_CFG );
 	/* Enable EOTP TX; Enable EDPI */
-	if (hisi_dsi->mode_flags == MIPI_DSI_MODE_VIDEO)
-		writel(hisi_dsi->vm.hactive, base +  EDPI_CMD_SIZE );
+	if (dsi->mode_flags == MIPI_DSI_MODE_VIDEO)
+		writel(dsi->vm.hactive, base +  EDPI_CMD_SIZE );
 
 	/*------------DSI and D-PHY Initialization-----------------*/
 
@@ -607,48 +612,50 @@ int hisi_dsi_mipi_init(struct hisi_drm_dsi *hisi_dsi)
 	return 0;
 }
 
-static void hisi_dsi_encoder_disable(struct drm_encoder *encoder)
+static void dsi_encoder_disable(struct drm_encoder *encoder)
 {
-	struct hisi_drm_dsi *hisi_dsi = encoder_to_dsi(encoder);
-	void __iomem *base = hisi_dsi->base;
+	struct hisi_dsi *dsi = encoder_to_dsi(encoder);
+	struct hisi_dsi_context *ctx = dsi->ctx;
+	void __iomem *base = ctx->base;
 	
 	writel( PWR_UP_OFF, base +  PWR_UP );
 	writel(0x0, base +  LPCLK_CTRL );
 	writel(0x00000000, base +  PHY_RSTZ );
-	clk_disable_unprepare(hisi_dsi->dsi_cfg_clk);
-
+	clk_disable_unprepare(ctx->dsi_cfg_clk);
 }
 
-static void hisi_dsi_encoder_enable(struct drm_encoder *encoder)
+static void dsi_encoder_enable(struct drm_encoder *encoder)
 {
-	struct hisi_drm_dsi *hisi_dsi = encoder_to_dsi(encoder);
+	struct hisi_dsi *dsi = encoder_to_dsi(encoder);
+	struct hisi_dsi_context *ctx = dsi->ctx;
 	int ret;
 
 	/* mipi dphy clock enable */
-	ret = clk_prepare_enable(hisi_dsi->dsi_cfg_clk);
+	ret = clk_prepare_enable(ctx->dsi_cfg_clk);
 	if (ret) {
 		DRM_ERROR("failed to enable dsi_cfg_clk, error=%d!\n", ret);
 		return;
 	}
 
-	ret = hisi_dsi_mipi_init(hisi_dsi);
+	ret = dsi_mipi_init(dsi);
 	if (ret) {
 		DRM_ERROR("failed to init mipi, error=%d!\n", ret);
 		return;
 	}
 }
 
-void hisi_dsi_encoder_mode_set(struct drm_encoder *encoder,
+void dsi_encoder_mode_set(struct drm_encoder *encoder,
 					struct drm_display_mode *mode,
 					struct drm_display_mode *adjusted_mode)
 {
-	struct hisi_drm_dsi *hisi_dsi = encoder_to_dsi(encoder);
-	struct videomode *vm = &hisi_dsi->vm;
+	struct hisi_dsi *dsi = encoder_to_dsi(encoder);
+	struct hisi_dsi_context *ctx = dsi->ctx;
+	struct videomode *vm = &dsi->vm;
 	u32 dphy_freq_kHz;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 	vm->pixelclock = adjusted_mode->clock;
-	hisi_dsi->nominal_pixel_clock_kHz = mode->clock;
+	ctx->nominal_pixel_clock_kHz = mode->clock;
 
 	vm->hactive = mode->hdisplay;
 	vm->vactive = mode->vdisplay;
@@ -659,14 +666,14 @@ void hisi_dsi_encoder_mode_set(struct drm_encoder *encoder,
 	vm->hback_porch = mode->htotal - mode->hsync_end;
 	vm->hsync_len = mode->hsync_end - mode->hsync_start;
 
-	hisi_dsi->lanes = 3 + !!(vm->pixelclock >= 115000);
+	dsi->lanes = 3 + !!(vm->pixelclock >= 115000);
 
-	dphy_freq_kHz = vm->pixelclock * 24 / hisi_dsi->lanes;
+	dphy_freq_kHz = vm->pixelclock * 24 / dsi->lanes;
 	/* this avoids a less-compatible DSI rate with 1.2GHz px PLL */
 	if (dphy_freq_kHz == 600000)
 		dphy_freq_kHz = 640000;
 
-	set_dsi_phy_rate_equal_or_faster(&dphy_freq_kHz, &hisi_dsi->phyreg);
+	set_dsi_phy_rate_equal_or_faster(&dphy_freq_kHz, &dsi->phyreg);
 
 	vm->flags = 0;
 	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
@@ -721,7 +728,7 @@ static struct drm_display_mode mode_800x600 = {
 	.height_mm	= 420,
 };
 
-static int hisi_dsi_connector_get_modes(struct drm_connector *connector)
+static int dsi_connector_get_modes(struct drm_connector *connector)
 {
 	struct drm_display_mode *mode;
 
@@ -743,45 +750,45 @@ static int hisi_dsi_connector_get_modes(struct drm_connector *connector)
 }
 
 struct hisi_connector_funcs hisi_dsi_connector_ops = {
-	.get_modes = hisi_dsi_connector_get_modes,
+	.get_modes = dsi_connector_get_modes,
 };
 
 struct hisi_encoder_funcs hisi_dsi_encoder_ops = {
-	.mode_set = hisi_dsi_encoder_mode_set,
-	.enable = hisi_dsi_encoder_enable,
-	.disable = hisi_dsi_encoder_disable,
+	.mode_set = dsi_encoder_mode_set,
+	.enable = dsi_encoder_enable,
+	.disable = dsi_encoder_disable,
 };
 
 static int hisi_dsi_bind(struct device *dev, struct device *master,
 								void *data)
 {
-	struct hisi_drm_dsi *hisi_dsi = dev_get_drvdata(dev);
+	struct hisi_dsi_context *ctx = dev_get_drvdata(dev);
 	int ret = 0;
 	
-	hisi_dsi->dev = data;
+	ctx->dev = data;
 
-	hisi_drm_encoder_init(hisi_dsi->dev, &hisi_dsi->hisi_encoder.base.base);
+	hisi_drm_encoder_init(ctx->dev, &ctx->dsi.hisi_encoder.base.base);
 
 #ifdef CONFIG_DRM_HISI_HAS_SLAVE_ENCODER
 	/* int ret; */
-	ret = hisi_dsi->drm_i2c_driver->encoder_init(hisi_dsi->client, hisi_dsi->dev,
-							&hisi_dsi->hisi_encoder.base);
+	ret = ctx->drm_i2c_driver->encoder_init(ctx->client, ctx->dev,
+							&ctx->dsi.hisi_encoder.base);
 	if (ret) {
 		DRM_ERROR("drm_i2c_encoder_init error\n");
 		return ret;
 	}
 
-	if (!hisi_dsi->hisi_encoder.base.slave_funcs) {
+	if (!ctx->dsi.hisi_encoder.base.slave_funcs) {
 		DRM_ERROR("failed check encoder function\n");
 		return -ENODEV;
 	}
 #endif
-	hisi_drm_connector_init(hisi_dsi->dev, &hisi_dsi->hisi_encoder.base.base,
-						&hisi_dsi->hisi_connector.connector);
+	hisi_drm_connector_init(ctx->dev, &ctx->dsi.hisi_encoder.base.base,
+						&ctx->dsi.hisi_connector.connector);
 
 	/* fbdev initialization should be put at last position */
 #ifdef CONFIG_DRM_HISI_FBDEV
-	ret = hisi_drm_fbdev_init(hisi_dsi->dev);
+	ret = hisi_drm_fbdev_init(ctx->dev);
 	if (ret) {
 		DRM_ERROR("failed to initialize fbdev\n");
 		return ret;
@@ -791,7 +798,7 @@ static int hisi_dsi_bind(struct device *dev, struct device *master,
 }
 
 static void hisi_dsi_unbind(struct device *dev, struct device *master,
-	void *data)
+							void *data)
 {
 	/* do nothing */
 }
@@ -804,36 +811,33 @@ static const struct component_ops hisi_dsi_ops = {
 static int hisi_dsi_probe(struct platform_device *pdev)
 {
 	int ret;
-	struct hisi_drm_dsi *hisi_dsi;
+	struct hisi_dsi_context *ctx;
+	struct hisi_dsi *dsi;
 	struct resource *res;
 	struct device_node *slave_node;
 	struct device_node *np = pdev->dev.of_node;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	hisi_dsi = devm_kzalloc(&pdev->dev, sizeof(*hisi_dsi), GFP_KERNEL);
-	if (!hisi_dsi) {
+	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
+	if (!ctx) {
 		dev_err(&pdev->dev, "failed to allocate hisi dsi object.\n");
 		ret = -ENOMEM;
 	}
-
-	hisi_dsi->dsi_cfg_clk = clk_get(&pdev->dev, "pclk_dsi");
-	if (IS_ERR(hisi_dsi->dsi_cfg_clk)) {
+	
+	ctx->dsi_cfg_clk = clk_get(&pdev->dev, "pclk_dsi");
+	if (IS_ERR(ctx->dsi_cfg_clk)) {
 		dev_info(&pdev->dev, "failed to get dsi clock");
-		ret = PTR_ERR(hisi_dsi->dsi_cfg_clk);
+		ret = PTR_ERR(ctx->dsi_cfg_clk);
 	}
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	hisi_dsi->base = devm_ioremap_resource(&pdev->dev, res);
-	if (IS_ERR(hisi_dsi->base)) {
+	ctx->base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(ctx->base)) {
 		dev_err(&pdev->dev, "failed to remap io region\n");
-		ret = PTR_ERR(hisi_dsi->base);
+		ret = PTR_ERR(ctx->base);
 	}
 
-	ret = of_property_read_u32(pdev->dev.of_node, "vc", &hisi_dsi->vc);
-	if (ret)
-		dev_err(&pdev->dev, "failed to get vc");
-
 	slave_node = of_parse_phandle(np, "encoder-slave", 0);
 	if (!slave_node) {
 		DRM_ERROR("failed to get slave encoder node\n");
@@ -841,38 +845,40 @@ static int hisi_dsi_probe(struct platform_device *pdev)
 	}
 
 #ifdef CONFIG_DRM_HISI_HAS_SLAVE_ENCODER
-	hisi_dsi->client = of_find_i2c_device_by_node(slave_node);
+	ctx->client = of_find_i2c_device_by_node(slave_node);
 	of_node_put(slave_node);
-	if (!hisi_dsi->client) {
+	if (!ctx->client) {
 		DRM_INFO("failed to find slave encoder i2c client\n");
 		return -EPROBE_DEFER;
 	}
 
-	if (!hisi_dsi->client->dev.driver) {
+	if (!ctx->client->dev.driver) {
 		DRM_INFO("%s: NULL client driver\n", __func__);
 		return -EPROBE_DEFER;
 	}
 
-	hisi_dsi->drm_i2c_driver = to_drm_i2c_encoder_driver(
-		to_i2c_driver(hisi_dsi->client->dev.driver));
-	if (IS_ERR(hisi_dsi->drm_i2c_driver)) {
-		pr_err("failed initialize encoder driver %ld\n", PTR_ERR(hisi_dsi->drm_i2c_driver));
+	ctx->drm_i2c_driver = to_drm_i2c_encoder_driver(
+		to_i2c_driver(ctx->client->dev.driver));
+	if (IS_ERR(ctx->drm_i2c_driver)) {
+		pr_err("failed initialize encoder driver %ld\n", PTR_ERR(ctx->drm_i2c_driver));
 		return -EPROBE_DEFER;
 	}
 #endif
 
-	hisi_dsi->color_mode = DSI_24BITS_1;
-	hisi_dsi->date_enable_pol = 0;
-	hisi_dsi->lanes = 3;
-	hisi_dsi->format = MIPI_DSI_FMT_RGB888;
-	hisi_dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+	dsi = &ctx->dsi;
+	dsi->ctx = ctx;
+	dsi->color_mode = DSI_24BITS_1;
+	dsi->date_enable_pol = 0;
+	dsi->lanes = 3;
+	dsi->format = MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 
-	hisi_dsi->hisi_encoder.ops = &hisi_dsi_encoder_ops;
-	hisi_dsi->hisi_connector.encoder = &hisi_dsi->hisi_encoder.base.base;
-	hisi_dsi->hisi_connector.ops = &hisi_dsi_connector_ops;
+	dsi->hisi_encoder.ops = &hisi_dsi_encoder_ops;
+	dsi->hisi_connector.encoder = &dsi->hisi_encoder.base.base;
+	dsi->hisi_connector.ops = &hisi_dsi_connector_ops;
+
+	platform_set_drvdata(pdev, ctx);
 
-	platform_set_drvdata(pdev, hisi_dsi);
-	
 	return component_add(&pdev->dev, &hisi_dsi_ops);
 	
 	DRM_DEBUG_DRIVER("exit success.\n");
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_encoder.c b/drivers/gpu/drm/hisilicon/hisi_drm_encoder.c
index 7b9e1e66b92ded..160177f8b75342 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_encoder.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_encoder.c
@@ -12,27 +12,29 @@
 
 #include <linux/io.h>
 #include <linux/types.h>
+#include <video/videomode.h>
+
 #include <drm/drmP.h>
 #include <drm/drm_crtc_helper.h>
-#include <video/videomode.h>
 #include <drm/drm_encoder_slave.h>
 #include <drm/drm_atomic_helper.h>
 
 #include "hisi_drm_drv.h"
 #include "hisi_drm_encoder.h"
 
-#define get_hisi_encoder(encoder) \
+#define to_hisi_encoder(encoder) \
 	container_of(encoder, struct hisi_encoder, base.base)
 
 void hisi_drm_encoder_disable(struct drm_encoder *encoder)
 {
-	struct hisi_encoder *hisi_encoder = get_hisi_encoder(encoder);
+	struct hisi_encoder *hencoder = to_hisi_encoder(encoder);
+	struct hisi_encoder_funcs *ops = hencoder->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 	
 	DRM_DEBUG_DRIVER("enter. \n");
 
-	if (hisi_encoder->ops->enable)
-		hisi_encoder->ops->disable(encoder);
+	if (ops->enable)
+		ops->disable(encoder);
 
 	if (sfuncs && sfuncs->dpms)
 		sfuncs->dpms(encoder, DRM_MODE_DPMS_OFF);
@@ -43,13 +45,14 @@ void hisi_drm_encoder_disable(struct drm_encoder *encoder)
 
 void hisi_drm_encoder_enable(struct drm_encoder *encoder)
 {
-	struct hisi_encoder *hisi_encoder = get_hisi_encoder(encoder);
+	struct hisi_encoder *hencoder = to_hisi_encoder(encoder);
+	struct hisi_encoder_funcs *ops = hencoder->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 	
 	DRM_DEBUG_DRIVER("enter. \n");
 
-	if (hisi_encoder->ops->enable)
-		hisi_encoder->ops->enable(encoder);
+	if (ops->enable)
+		ops->enable(encoder);
 
 	if (sfuncs && sfuncs->dpms)
 		sfuncs->dpms(encoder, DRM_MODE_DPMS_ON);
@@ -61,14 +64,14 @@ void hisi_drm_encoder_mode_set(struct drm_encoder *encoder,
 					struct drm_display_mode *mode,
 					struct drm_display_mode *adjusted_mode)
 {
-
-	struct hisi_encoder *hisi_encoder = get_hisi_encoder(encoder);
+	struct hisi_encoder *hencoder = to_hisi_encoder(encoder);
+	struct hisi_encoder_funcs *ops = hencoder->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	if (hisi_encoder->ops->mode_set)
-		hisi_encoder->ops->mode_set(encoder, mode, adjusted_mode);
+	if (ops->mode_set)
+		ops->mode_set(encoder, mode, adjusted_mode);
 
 	if (sfuncs && sfuncs->mode_set)
 		sfuncs->mode_set(encoder, mode, adjusted_mode);
@@ -81,14 +84,15 @@ hisi_drm_encoder_mode_fixup(struct drm_encoder *encoder,
 				const struct drm_display_mode *mode,
 				struct drm_display_mode *adjusted_mode)
 {
-	struct hisi_encoder *hisi_encoder = get_hisi_encoder(encoder);
+	struct hisi_encoder *hencoder = to_hisi_encoder(encoder);
+	struct hisi_encoder_funcs *ops = hencoder->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 	bool ret = true;
 
 	DRM_DEBUG_DRIVER("enter.\n");
 
-	if (hisi_encoder->ops->mode_fixup)
-		hisi_encoder->ops->mode_fixup(encoder, mode, adjusted_mode);
+	if (ops->mode_fixup)
+		ops->mode_fixup(encoder, mode, adjusted_mode);
 
 	if (sfuncs && sfuncs->mode_fixup)
 		ret = sfuncs->mode_fixup(encoder, mode, adjusted_mode);
@@ -100,13 +104,14 @@ hisi_drm_encoder_mode_fixup(struct drm_encoder *encoder,
 
 void hisi_drm_encoder_destroy(struct drm_encoder *encoder)
 {
-	struct hisi_encoder *hisi_encoder = get_hisi_encoder(encoder);
+	struct hisi_encoder *hencoder = to_hisi_encoder(encoder);
+	struct hisi_encoder_funcs *ops = hencoder->ops;
 	struct drm_encoder_slave_funcs *sfuncs = get_slave_funcs(encoder);
 
 	DRM_DEBUG_DRIVER("enter.\n");
 	
-	if (hisi_encoder->ops->destroy)
-		hisi_encoder->ops->destroy(encoder);
+	if (ops->destroy)
+		ops->destroy(encoder);
 
 	/*release*/
 	if (sfuncs && sfuncs->destroy)
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_encoder.h b/drivers/gpu/drm/hisilicon/hisi_drm_encoder.h
index ee5264692498b8..28b57e4e0dc1f7 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_encoder.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_encoder.h
@@ -13,6 +13,23 @@
 #ifndef __HISI_DRM_ENCODER_H__
 #define __HISI_DRM_ENCODER_H__
 
+struct hisi_encoder_funcs {
+	void (*destroy)(struct drm_encoder *encoder);
+	bool (*mode_fixup)(struct drm_encoder *encoder,
+				const struct drm_display_mode *mode,
+				struct drm_display_mode *adjusted_mode);
+	void (*mode_set)(struct drm_encoder *encoder,
+					struct drm_display_mode *mode,
+					struct drm_display_mode *adjusted_mode);
+	void (*enable)(struct drm_encoder *encoder);
+	void (*disable)(struct drm_encoder *encoder);
+};
+
+struct hisi_encoder {
+	struct drm_encoder_slave base;
+	void *ops;
+};
+
 static inline struct drm_encoder_slave_funcs *
 		get_slave_funcs(struct drm_encoder *enc)
 {
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_fb.h b/drivers/gpu/drm/hisilicon/hisi_drm_fb.h
index 98b7734a90bbff..e8a31402c94834 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_fb.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_fb.h
@@ -9,6 +9,7 @@
  * published by the Free Software Foundation.
  *
  */
+
 #ifndef __HISI_DRM_FB_H__
 #define __HISI_DRM_FB_H__
 
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c b/drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c
index cb5ce1b3422771..49be815b08f2bd 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_fbdev.c
@@ -15,14 +15,13 @@
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_fb_helper.h>
 #include <drm/drm_gem_cma_helper.h>
+
 #include "hisi_drm_fb.h"
 #include "hisi_drm_fbdev.h"
 #include "hisi_drm_drv.h"
 
-
 #define PREFERRED_BPP		32
 
-
 static inline
 struct hisi_drm_fbdev *to_hisi_drm_fbdev(struct drm_fb_helper *helper)
 {
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_plane.c b/drivers/gpu/drm/hisilicon/hisi_drm_plane.c
index 0da7029d7619f5..b062420bbc9a57 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_plane.c
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_plane.c
@@ -11,16 +11,75 @@
  */
 
 #include <drm/drmP.h>
-
-#include <drm/drm_crtc.h>
 #include <drm/drm_plane_helper.h>
 #include <drm/drm_atomic_helper.h>
 
-#include <drm/drm_encoder_slave.h>
 #include "hisi_drm_drv.h"
-
-#include "hisi_ade.h"
 #include "hisi_drm_plane.h"
+#include "hisi_drm_crtc.h"
+#include "hisi_ade.h"
+
+#define to_hisi_plane(plane) \
+		container_of(plane, struct hisi_plane, base)
+
+static void hisi_plane_atomic_disable(struct drm_plane *plane,
+			       struct drm_plane_state *old_state)
+{
+	struct hisi_plane *hplane = to_hisi_plane(plane);
+	struct hisi_plane_funcs *ops = hplane->ops;
+
+	DRM_DEBUG_DRIVER("enter.\n");
+
+	if (!old_state->crtc)
+		return;
+	
+	if (ops->atomic_disable)
+		ops->atomic_disable(hplane, old_state);
+
+	DRM_DEBUG_DRIVER("exit success.\n");
+}
+
+static void hisi_plane_atomic_update(struct drm_plane *plane,
+				       struct drm_plane_state *old_state)
+{
+	struct hisi_plane *hplane = to_hisi_plane(plane);
+	struct hisi_plane_funcs *ops = hplane->ops;
+	struct drm_plane_state	*hstate	= plane->state;
+
+	DRM_DEBUG_DRIVER("enter.\n");
+	if (!hstate->crtc)
+		return;
+	
+	if (ops->atomic_update)
+		ops->atomic_update(hplane, old_state);
+
+	DRM_DEBUG_DRIVER("exit success.\n");
+}
+
+int hisi_plane_atomic_check(struct drm_plane *plane,
+				     struct drm_plane_state *state)
+{
+	DRM_DEBUG_DRIVER("enter.\n");
+	DRM_DEBUG_DRIVER("exit success.\n");
+	return 0;
+}
+
+void hisi_plane_cleanup_fb(struct drm_plane *plane,
+				struct drm_framebuffer *fb,
+				const struct drm_plane_state *old_state)
+{
+	DRM_DEBUG_DRIVER("enter.\n");
+	DRM_DEBUG_DRIVER("exit success.\n");
+}
+
+int hisi_plane_prepare_fb(struct drm_plane *p,
+				struct drm_framebuffer *fb,
+				const struct drm_plane_state *new_state)
+{
+	DRM_DEBUG_DRIVER("enter.\n");
+	DRM_DEBUG_DRIVER("exit success.\n");
+	return 0;
+}
 
 static const struct drm_plane_helper_funcs hisi_plane_helper_funcs = {
 	.prepare_fb = hisi_plane_prepare_fb,
@@ -30,10 +89,15 @@ static const struct drm_plane_helper_funcs hisi_plane_helper_funcs = {
 	.atomic_disable = hisi_plane_atomic_disable,
 };
 
+void hisi_plane_destroy(struct drm_plane *plane)
+{
+	drm_plane_cleanup(plane);
+}
+
 static void hisi_plane_atomic_reset(struct drm_plane *plane)
 {
 	struct hisi_plane *hplane = to_hisi_plane(plane);
-	struct hisi_plane_state *state;
+	struct hisi_plane_state *hstate;
 
 	if (plane->state && plane->state->fb)
 		drm_framebuffer_unreference(plane->state->fb);
@@ -41,31 +105,31 @@ static void hisi_plane_atomic_reset(struct drm_plane *plane)
 	kfree(plane->state);
 	plane->state = NULL;
 
-	state = kzalloc(sizeof(*state), GFP_KERNEL);
-	if (state == NULL)
+	hstate = kzalloc(sizeof(*hstate), GFP_KERNEL);
+	if (hstate == NULL)
 		return;
 
 	/* set to default value */
-	state->zpos = hplane->ch;
-	state->base.rotation = BIT(DRM_ROTATE_0);
-	state->alpha = 255;
-	state->blending = ALPHA_BLENDING_NONE;
+	hstate->zpos = hplane->ch;
+	hstate->base.rotation = BIT(DRM_ROTATE_0);
+	hstate->alpha = 255;
+	hstate->blending = ALPHA_BLENDING_NONE;
 
-	plane->state = &state->base;
+	plane->state = &hstate->base;
 	plane->state->plane = plane;
 }
 
 static struct drm_plane_state *
 hisi_plane_atomic_duplicate_state(struct drm_plane *plane)
 {
-	struct hisi_plane_state *state;
+	struct hisi_plane_state *hstate;
 	struct hisi_plane_state *copy;
 
 	if (WARN_ON(!plane->state))
 		return NULL;
 
-	state = to_hisi_plane_state(plane->state);
-	copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
+	hstate = to_hisi_plane_state(plane->state);
+	copy = kmemdup(hstate, sizeof(*hstate), GFP_KERNEL);
 	if (copy == NULL)
 		return NULL;
 
@@ -87,13 +151,9 @@ static int hisi_plane_atomic_set_property(struct drm_plane *plane,
 					  struct drm_property *property,
 					  uint64_t val)
 {
-	struct hisi_plane *hplane = to_hisi_plane(plane);
 	struct hisi_drm_private *priv = plane->dev->dev_private;
 	struct hisi_plane_state *hstate = to_hisi_plane_state(state);
 
-	DRM_DEBUG_DRIVER("\"%s\": channel%d, val=%d\n", property->name,
-			hplane->ch, val);
-
 	if (property == priv->zpos_prop)
 		hstate->zpos = val;
 	else if (property == priv->alpha_prop)
@@ -138,39 +198,35 @@ static struct drm_plane_funcs hisi_plane_funcs = {
 	.atomic_get_property = hisi_plane_atomic_get_property,
 };
 
-struct hisi_plane *hisi_drm_plane_init(struct drm_device *dev,
-					   void *ctx,
-					   u32 ch,
-					   const u32 *formats,
-					   u32 formats_cnt,
-					   enum drm_plane_type type)
+int hisi_drm_plane_init(struct drm_device *dev,
+			struct hisi_plane *hplane,
+				enum drm_plane_type type)
 {
-	struct hisi_plane *plane;
-	int ret;
-
-	plane = devm_kzalloc(dev->dev, sizeof(*plane), GFP_KERNEL);
-	if (!plane)
-		return ERR_PTR(-ENOMEM);
-	
-	plane->ctx = ctx;
-	plane->ch = ch;
-	
-	DRM_DEBUG_DRIVER("plane init: ch=%d,type=%d, formats_count=%d\n",
-			ch, type, formats_cnt);
-	ret = drm_universal_plane_init(dev, &plane->base, 1,
-					&hisi_plane_funcs,
-					formats,
-					formats_cnt,
-					type);
+	struct hisi_plane_funcs *ops = hplane->ops;
+	const u32 *fmts;
+	u32 fmts_cnt;
+	int ret = 0;
+
+	/* get  properties */
+	fmts_cnt = ops->get_properties(hplane->ch, &fmts);
+	if (ret)
+		return ret;
+
+	ret = drm_universal_plane_init(dev, &hplane->base, 1,
+				&hisi_plane_funcs, fmts, fmts_cnt, type);
 	if (ret) {
-		DRM_ERROR("fail to init plane\n");
-		return ERR_PTR(ret);
+		DRM_ERROR("fail to init plane, ch=%d\n", hplane->ch);
+		return ret;
 	}
 
-	drm_plane_helper_add(&plane->base, &hisi_plane_helper_funcs);
+	drm_plane_helper_add(&hplane->base, &hisi_plane_helper_funcs);
 
 	/* install  properties */
-	ade_install_plane_properties(dev, plane);
-	
-	return plane;
+	if (ops->install_properties) {
+		ret = ops->install_properties(dev, hplane);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
 }
diff --git a/drivers/gpu/drm/hisilicon/hisi_drm_plane.h b/drivers/gpu/drm/hisilicon/hisi_drm_plane.h
index fbce5eb1b86fb7..54e76dda0e43fd 100644
--- a/drivers/gpu/drm/hisilicon/hisi_drm_plane.h
+++ b/drivers/gpu/drm/hisilicon/hisi_drm_plane.h
@@ -13,13 +13,47 @@
 #ifndef __HISI_DRM_PLANE_H__
 #define __HISI_DRM_PLANE_H__
 
-#define to_hisi_plane(p)	container_of(p, struct hisi_plane, base)
-#define to_hisi_plane_state(s)	container_of(s, struct hisi_plane_state, base)
-
-struct hisi_plane *hisi_drm_plane_init(struct drm_device *dev,
-					   void *ctx,
-					   u32 ch,
-					   const u32 *formats,
-					   u32 formats_cnt,
-					   enum drm_plane_type type);
+//#define to_hisi_plane(p)        container_of(p, struct hisi_plane, base)
+#define to_hisi_plane_state(s)  container_of(s, struct hisi_plane_state, base)
+
+enum {
+	/* no blending */
+	ALPHA_BLENDING_NONE     = 0x0100,
+	/* ONE / ONE_MINUS_SRC_ALPHA */
+	ALPHA_BLENDING_PREMULT  = 0x0105,
+	/* SRC_ALPHA / ONE_MINUS_SRC_ALPHA */
+	ALPHA_BLENDING_COVERAGE = 0x0405
+};
+
+struct hisi_plane {
+	struct drm_plane base;
+	void *ops;
+	void *ctx;
+	u8 ch; /* channel or pipe */
+//	u8 zorder;
+};
+
+struct hisi_plane_funcs {
+	u32 (*get_properties)(u8 ch, const u32 **formats);
+	int (*install_properties)(struct drm_device *dev,
+					struct hisi_plane *hplane);
+	void (*atomic_update)(struct hisi_plane *hplane,
+				       struct drm_plane_state *old_state);
+	void (*atomic_disable)(struct hisi_plane *hplane,
+				       struct drm_plane_state *old_state);
+};
+
+/* plane structs  */
+struct hisi_plane_state {
+        struct drm_plane_state base;
+	u8 zpos;  /* z order */
+	u8 alpha; /* Alpha value applied to the whole plane */
+	u32 blending; /* blending cases: none, premult and coverage */
+};
+
+int hisi_drm_plane_init(struct drm_device *dev,
+			struct hisi_plane *hplane,
+				enum drm_plane_type type);
+
+
 #endif
diff --git a/drivers/gpu/drm/hisilicon/hisi_dsi_reg.h b/drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
index b630f157d8d59d..c13b1dbc40599d 100644
--- a/drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
+++ b/drivers/gpu/drm/hisilicon/hisi_dsi_reg.h
@@ -9,8 +9,8 @@
  *  published by the Free Software Foundation.
  *
  */
-#ifndef __HISI_DRM_DSI_H__
-#define __HISI_DRM_DSI_H__
+#ifndef __HISI_DSI_REG_H__
+#define __HISI_DSI_REG_H__
 
 #define  PWR_UP_ON                   (1)
 #define  PWR_UP_OFF                  (0)