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| 1 | +/* |
| 2 | + * Copyright (c) 2020 Geanix ApS |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#define DT_DRV_COMPAT microchip_mcp23017 |
| 8 | + |
| 9 | +/** |
| 10 | + * @file Driver for MCP23017 SPI-based GPIO driver. |
| 11 | + */ |
| 12 | + |
| 13 | +#include <errno.h> |
| 14 | + |
| 15 | +#include <kernel.h> |
| 16 | +#include <device.h> |
| 17 | +#include <init.h> |
| 18 | +#include <sys/byteorder.h> |
| 19 | +#include <drivers/gpio.h> |
| 20 | +#include <drivers/i2c.h> |
| 21 | + |
| 22 | +#include "gpio_mcp23017.h" |
| 23 | + |
| 24 | +#define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL |
| 25 | +#include <logging/log.h> |
| 26 | +LOG_MODULE_REGISTER(gpio_mcp23017); |
| 27 | + |
| 28 | +/** |
| 29 | + * @brief Read both port 0 and port 1 registers of certain register function. |
| 30 | + * |
| 31 | + * Given the register in reg, read the pair of port 0 and port 1. |
| 32 | + * |
| 33 | + * @param dev Device struct of the MCP23017. |
| 34 | + * @param reg Register to read (the PORTA of the pair of registers). |
| 35 | + * @param buf Buffer to read data into. |
| 36 | + * |
| 37 | + * @return 0 if successful, failed otherwise. |
| 38 | + */ |
| 39 | +static int read_port_regs(const struct device *dev, uint8_t reg, uint16_t *buf) { |
| 40 | + const struct mcp23017_config *const config = dev->config; |
| 41 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 42 | + int ret; |
| 43 | + uint16_t port_data; |
| 44 | + |
| 45 | + uint8_t addr = config->slave; |
| 46 | + |
| 47 | + ret = i2c_burst_read(drv_data->i2c, addr, reg, (uint8_t *)&port_data, sizeof(port_data)); |
| 48 | + if (ret) { |
| 49 | + LOG_DBG("i2c_write_read FAIL %d\n", ret); |
| 50 | + return ret; |
| 51 | + } |
| 52 | + |
| 53 | + *buf = sys_le16_to_cpu(port_data); |
| 54 | + |
| 55 | + LOG_DBG("MCP23017: Read: REG[0x%X] = 0x%X, REG[0x%X] = 0x%X", reg, (*buf & 0xFF), (reg + 1), |
| 56 | + (*buf >> 8)); |
| 57 | + |
| 58 | + return 0; |
| 59 | +} |
| 60 | + |
| 61 | +/** |
| 62 | + * @brief Write both port 0 and port 1 registers of certain register function. |
| 63 | + * |
| 64 | + * Given the register in reg, write the pair of port 0 and port 1. |
| 65 | + * |
| 66 | + * @param dev Device struct of the MCP23017. |
| 67 | + * @param reg Register to write into (the PORTA of the pair of registers). |
| 68 | + * @param buf Buffer to write data from. |
| 69 | + * |
| 70 | + * @return 0 if successful, failed otherwise. |
| 71 | + */ |
| 72 | +static int write_port_regs(const struct device *dev, uint8_t reg, uint16_t value) { |
| 73 | + const struct mcp23017_config *const config = dev->config; |
| 74 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 75 | + int ret; |
| 76 | + uint16_t port_data; |
| 77 | + |
| 78 | + LOG_DBG("MCP23017: Write: REG[0x%X] = 0x%X, REG[0x%X] = 0x%X", reg, (value & 0xFF), (reg + 1), |
| 79 | + (value >> 8)); |
| 80 | + |
| 81 | + port_data = sys_cpu_to_le16(value); |
| 82 | + |
| 83 | + ret = i2c_burst_write(drv_data->i2c, config->slave, reg, (uint8_t *)&port_data, |
| 84 | + sizeof(port_data)); |
| 85 | + if (ret) { |
| 86 | + LOG_DBG("i2c_write FAIL %d\n", ret); |
| 87 | + return ret; |
| 88 | + } |
| 89 | + |
| 90 | + return 0; |
| 91 | +} |
| 92 | + |
| 93 | +/** |
| 94 | + * @brief Setup the pin direction (input or output) |
| 95 | + * |
| 96 | + * @param dev Device struct of the MCP23017 |
| 97 | + * @param pin The pin number |
| 98 | + * @param flags Flags of pin or port |
| 99 | + * |
| 100 | + * @return 0 if successful, failed otherwise |
| 101 | + */ |
| 102 | +static int setup_pin_dir(const struct device *dev, uint32_t pin, int flags) { |
| 103 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 104 | + uint16_t *dir = &drv_data->reg_cache.iodir; |
| 105 | + uint16_t *output = &drv_data->reg_cache.gpio; |
| 106 | + int ret; |
| 107 | + |
| 108 | + if ((flags & GPIO_OUTPUT) != 0U) { |
| 109 | + if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) { |
| 110 | + *output |= BIT(pin); |
| 111 | + } else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) { |
| 112 | + *output &= ~BIT(pin); |
| 113 | + } |
| 114 | + *dir &= ~BIT(pin); |
| 115 | + } else { |
| 116 | + *dir |= BIT(pin); |
| 117 | + } |
| 118 | + |
| 119 | + ret = write_port_regs(dev, REG_GPIO_PORTA, *output); |
| 120 | + if (ret != 0) { |
| 121 | + return ret; |
| 122 | + } |
| 123 | + |
| 124 | + ret = write_port_regs(dev, REG_IODIR_PORTA, *dir); |
| 125 | + |
| 126 | + return ret; |
| 127 | +} |
| 128 | + |
| 129 | +/** |
| 130 | + * @brief Setup the pin pull up/pull down status |
| 131 | + * |
| 132 | + * @param dev Device struct of the MCP23017 |
| 133 | + * @param pin The pin number |
| 134 | + * @param flags Flags of pin or port |
| 135 | + * |
| 136 | + * @return 0 if successful, failed otherwise |
| 137 | + */ |
| 138 | +static int setup_pin_pullupdown(const struct device *dev, uint32_t pin, int flags) { |
| 139 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 140 | + uint16_t port; |
| 141 | + int ret; |
| 142 | + |
| 143 | + /* Setup pin pull up or pull down */ |
| 144 | + port = drv_data->reg_cache.gppu; |
| 145 | + |
| 146 | + /* pull down == 0, pull up == 1 */ |
| 147 | + if ((flags & GPIO_PULL_DOWN) != 0U) { |
| 148 | + return -ENOTSUP; |
| 149 | + } |
| 150 | + |
| 151 | + WRITE_BIT(port, pin, (flags & GPIO_PULL_UP) != 0U); |
| 152 | + |
| 153 | + ret = write_port_regs(dev, REG_GPPU_PORTA, port); |
| 154 | + if (ret == 0) { |
| 155 | + drv_data->reg_cache.gppu = port; |
| 156 | + } |
| 157 | + |
| 158 | + return ret; |
| 159 | +} |
| 160 | + |
| 161 | +static int mcp23017_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags) { |
| 162 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 163 | + int ret; |
| 164 | + |
| 165 | + /* Can't do SPI bus operations from an ISR */ |
| 166 | + if (k_is_in_isr()) { |
| 167 | + return -EWOULDBLOCK; |
| 168 | + } |
| 169 | + |
| 170 | + k_sem_take(&drv_data->lock, K_FOREVER); |
| 171 | + |
| 172 | + if ((flags & GPIO_OPEN_DRAIN) != 0U) { |
| 173 | + ret = -ENOTSUP; |
| 174 | + goto done; |
| 175 | + }; |
| 176 | + |
| 177 | + ret = setup_pin_dir(dev, pin, flags); |
| 178 | + if (ret) { |
| 179 | + LOG_ERR("MCP23017: error setting pin direction (%d)", ret); |
| 180 | + goto done; |
| 181 | + } |
| 182 | + |
| 183 | + ret = setup_pin_pullupdown(dev, pin, flags); |
| 184 | + if (ret) { |
| 185 | + LOG_ERR("MCP23017: error setting pin pull up/down (%d)", ret); |
| 186 | + goto done; |
| 187 | + } |
| 188 | + |
| 189 | +done: |
| 190 | + k_sem_give(&drv_data->lock); |
| 191 | + return ret; |
| 192 | +} |
| 193 | + |
| 194 | +static int mcp23017_port_get_raw(const struct device *dev, uint32_t *value) { |
| 195 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 196 | + uint16_t buf; |
| 197 | + int ret; |
| 198 | + |
| 199 | + /* Can't do SPI bus operations from an ISR */ |
| 200 | + if (k_is_in_isr()) { |
| 201 | + return -EWOULDBLOCK; |
| 202 | + } |
| 203 | + |
| 204 | + k_sem_take(&drv_data->lock, K_FOREVER); |
| 205 | + |
| 206 | + ret = read_port_regs(dev, REG_GPIO_PORTA, &buf); |
| 207 | + if (ret != 0) { |
| 208 | + goto done; |
| 209 | + } |
| 210 | + |
| 211 | + *value = buf; |
| 212 | + |
| 213 | +done: |
| 214 | + k_sem_give(&drv_data->lock); |
| 215 | + return ret; |
| 216 | +} |
| 217 | + |
| 218 | +static int mcp23017_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) { |
| 219 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 220 | + uint16_t buf; |
| 221 | + int ret; |
| 222 | + |
| 223 | + /* Can't do SPI bus operations from an ISR */ |
| 224 | + if (k_is_in_isr()) { |
| 225 | + return -EWOULDBLOCK; |
| 226 | + } |
| 227 | + |
| 228 | + k_sem_take(&drv_data->lock, K_FOREVER); |
| 229 | + |
| 230 | + buf = drv_data->reg_cache.gpio; |
| 231 | + buf = (buf & ~mask) | (mask & value); |
| 232 | + |
| 233 | + ret = write_port_regs(dev, REG_GPIO_PORTA, buf); |
| 234 | + if (ret == 0) { |
| 235 | + drv_data->reg_cache.gpio = buf; |
| 236 | + } |
| 237 | + |
| 238 | + k_sem_give(&drv_data->lock); |
| 239 | + |
| 240 | + return ret; |
| 241 | +} |
| 242 | + |
| 243 | +static int mcp23017_port_set_bits_raw(const struct device *dev, uint32_t mask) { |
| 244 | + return mcp23017_port_set_masked_raw(dev, mask, mask); |
| 245 | +} |
| 246 | + |
| 247 | +static int mcp23017_port_clear_bits_raw(const struct device *dev, uint32_t mask) { |
| 248 | + return mcp23017_port_set_masked_raw(dev, mask, 0); |
| 249 | +} |
| 250 | + |
| 251 | +static int mcp23017_port_toggle_bits(const struct device *dev, uint32_t mask) { |
| 252 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 253 | + uint16_t buf; |
| 254 | + int ret; |
| 255 | + |
| 256 | + /* Can't do SPI bus operations from an ISR */ |
| 257 | + if (k_is_in_isr()) { |
| 258 | + return -EWOULDBLOCK; |
| 259 | + } |
| 260 | + |
| 261 | + k_sem_take(&drv_data->lock, K_FOREVER); |
| 262 | + |
| 263 | + buf = drv_data->reg_cache.gpio; |
| 264 | + buf ^= mask; |
| 265 | + |
| 266 | + ret = write_port_regs(dev, REG_GPIO_PORTA, buf); |
| 267 | + if (ret == 0) { |
| 268 | + drv_data->reg_cache.gpio = buf; |
| 269 | + } |
| 270 | + |
| 271 | + k_sem_give(&drv_data->lock); |
| 272 | + |
| 273 | + return ret; |
| 274 | +} |
| 275 | + |
| 276 | +static int mcp23017_pin_interrupt_configure(const struct device *dev, gpio_pin_t pin, |
| 277 | + enum gpio_int_mode mode, enum gpio_int_trig trig) { |
| 278 | + return -ENOTSUP; |
| 279 | +} |
| 280 | + |
| 281 | +static const struct gpio_driver_api api_table = { |
| 282 | + .pin_configure = mcp23017_config, |
| 283 | + .port_get_raw = mcp23017_port_get_raw, |
| 284 | + .port_set_masked_raw = mcp23017_port_set_masked_raw, |
| 285 | + .port_set_bits_raw = mcp23017_port_set_bits_raw, |
| 286 | + .port_clear_bits_raw = mcp23017_port_clear_bits_raw, |
| 287 | + .port_toggle_bits = mcp23017_port_toggle_bits, |
| 288 | + .pin_interrupt_configure = mcp23017_pin_interrupt_configure, |
| 289 | +}; |
| 290 | + |
| 291 | +/** |
| 292 | + * @brief Initialization function of MCP23017 |
| 293 | + * |
| 294 | + * @param dev Device struct |
| 295 | + * @return 0 if successful, failed otherwise. |
| 296 | + */ |
| 297 | +static int mcp23017_init(const struct device *dev) { |
| 298 | + const struct mcp23017_config *const config = dev->config; |
| 299 | + struct mcp23017_drv_data *const drv_data = (struct mcp23017_drv_data *const)dev->data; |
| 300 | + |
| 301 | + drv_data->i2c = device_get_binding((char *)config->i2c_dev_name); |
| 302 | + if (!drv_data->i2c) { |
| 303 | + LOG_DBG("Unable to get i2c device"); |
| 304 | + return -ENODEV; |
| 305 | + } |
| 306 | + |
| 307 | + k_sem_init(&drv_data->lock, 1, 1); |
| 308 | + |
| 309 | + return 0; |
| 310 | +} |
| 311 | + |
| 312 | +#define MCP23017_INIT(inst) \ |
| 313 | + static struct mcp23017_config mcp23017_##inst##_config = { \ |
| 314 | + .i2c_dev_name = DT_INST_BUS_LABEL(inst), \ |
| 315 | + .slave = DT_INST_REG_ADDR(inst), \ |
| 316 | + \ |
| 317 | + }; \ |
| 318 | + \ |
| 319 | + static struct mcp23017_drv_data mcp23017_##inst##_drvdata = { \ |
| 320 | + /* Default for registers according to datasheet */ \ |
| 321 | + .reg_cache.iodir = 0xFFFF, .reg_cache.ipol = 0x0, .reg_cache.gpinten = 0x0, \ |
| 322 | + .reg_cache.defval = 0x0, .reg_cache.intcon = 0x0, .reg_cache.iocon = 0x0, \ |
| 323 | + .reg_cache.gppu = 0x0, .reg_cache.intf = 0x0, .reg_cache.intcap = 0x0, \ |
| 324 | + .reg_cache.gpio = 0x0, .reg_cache.olat = 0x0, \ |
| 325 | + }; \ |
| 326 | + \ |
| 327 | + /* This has to init after SPI master */ \ |
| 328 | + DEVICE_AND_API_INIT(mcp23017_##inst, DT_INST_LABEL(inst), mcp23017_init, \ |
| 329 | + &mcp23017_##inst##_drvdata, &mcp23017_##inst##_config, POST_KERNEL, \ |
| 330 | + CONFIG_GPIO_MCP23017_INIT_PRIORITY, &api_table); |
| 331 | + |
| 332 | +DT_INST_FOREACH_STATUS_OKAY(MCP23017_INIT) |
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