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50 changes: 50 additions & 0 deletions Documentation/devicetree/bindings/misc/amd,apml-alertl.yaml
Original file line number Diff line number Diff line change
@@ -0,0 +1,50 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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Commit message Please align with upstream style : dt-bindings: misc: apml-alert

%YAML 1.2
---
$id: http://devicetree.org/schemas/hwmon/amd,apml-alertl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: >
Sideband Remote Management Interface (SB-RMI) compliant
AMD APML Alert_L GPIO.

maintainers:
- Akshay Gupta <[email protected]>

description: |
Processors from AMD provide APML ALERT_L for BMC users to
monitor events.
APML Alert_L is asserted in multiple events,
- Machine Check Exception occurs within the system
- The processor alerts the SBI on system fatal error event
- Set by hardware as a result of a 0x71/0x72/0x73 command completion
- Set by firmware to indicate the completion of a mailbox operation
- High/Low Temperature Alert

APML Alert_L module define uevents to notify userspace of the
alert event.

properties:
compatible:
enum:
- apml-alertl

required:
- compatible
- gpio
- sbrmi
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please add more description for these tags. Like what is the input, parameters.. etc.

- sbtsi
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I saw that in Congo there is only iod0 is mentioned, and in morocco iod1 also mentioned. Please explain more here on the parameters for this tag.


additionalProperties: false

examples:
- |
/* Alert_L associated with Socket 0 */
alertl_sock0 {
compatible = "apml-alertl";
status = "okay";
gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
sbrmi = <&sbrmi_p0_iod0>;
sbtsi = <&sbtsi_p0_iod0>;
};
...
11 changes: 11 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-congo.dts
Original file line number Diff line number Diff line change
Expand Up @@ -894,6 +894,17 @@
#endif
};

/ {
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Commit message : start with ARM64:dts:aspeed:

/* Alert_L associated with socket 0 */
alertl_sock0 {
compatible = "apml-alertl";
status = "okay";
gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
sbrmi = <&sbrmi_p0_iod0>;
sbtsi = <&sbtsi_p0_iod0>;
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why is &sbtsi_p0_iod1 missing for Congo platforms?

};
};

#ifdef I3C_HUB

#define JESD300_SPD_I3C_MODE(bus, index, addr) \
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20 changes: 20 additions & 0 deletions arch/arm64/boot/dts/aspeed/aspeed-bmc-amd-morocco.dts
Original file line number Diff line number Diff line change
Expand Up @@ -984,6 +984,26 @@
#endif
};

/ {
/* Alert_L associated with socket 0 */
alertl_sock0 {
compatible = "apml-alertl";
status = "okay";
gpios = <&ltpi0_gpio 20 GPIO_ACTIVE_LOW>;
sbrmi = <&sbrmi_p0_iod0>;
sbtsi = <&sbtsi_p0_iod0 &sbtsi_p0_iod1>;
};

/* Alert_L associated with socket 1 */
alertl_sock1 {
compatible = "apml-alertl";
status = "okay";
gpios = <&ltpi0_gpio 104 GPIO_ACTIVE_LOW>;
sbrmi = <&sbrmi_p1_iod0>;
sbtsi = <&sbtsi_p1_iod0 &sbtsi_p1_iod1>;
};
};

#ifdef I3C_HUB

#define JESD300_SPD_I3C_MODE(bus, index, addr) \
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11 changes: 11 additions & 0 deletions drivers/misc/amd-apml/Kconfig
Original file line number Diff line number Diff line change
Expand Up @@ -24,3 +24,14 @@ config APML_SBTSI

This driver can also be built as a module. If so, the module will
be called apml_sbtsi.

config APML_ALERTL
tristate "Emulated apml alertl interface driver over i3c bus"
depends on APML_SBRMI && APML_SBTSI
default n
help
If you say yes here you get support for emulated alertl
interface on AMD SoCs with APML interface connected to a BMC device.

This driver can also be built as a module. If so, the module will
be called apml_alertl.
1 change: 1 addition & 0 deletions drivers/misc/amd-apml/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -6,3 +6,4 @@

obj-$(CONFIG_APML_SBRMI) += sbrmi.o sbrmi-common.o
obj-$(CONFIG_APML_SBTSI) += apml_sbtsi.o
obj-$(CONFIG_APML_ALERTL) += apml_alertl.o
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