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Status of iverilog VPI, consider removing warning from link script #869

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@quark17

The script src/exec/bsc_build_vsim_iverilog, which is used by BSC for linking iverilog simulations, prints this message:

WARNING: IVerilog support for VPI is incomplete.  BSV designs using foreign
         functions are not guaranteed to compile or simulate correctly.

It's probably time to remove this warning (or make a way to silence it?). Icarus Verilog has improved a lot since that message was created, and we've also fixed an issue in VPI wrapper generation (for value tasks with no arguments) that turned out to be our fault. Also, iverilog is the only simulator that BSC warns for, even though other simulators might also have issues -- for example, BSC doesn't support polymorphic BDPI with Verilator (but that manifests as a compilation error, not runtime bad values).

The only remaining places in the testsuite where Icarus Verilog 13+ is expected to have issues (that are related to VPI) are:

  • bsc.verilog/tasks/: StringDisplay.bsv
  • bsc.codegen/foreign/battery/: TestValues.bsv, TestActions, TestActionValues, TestActionValuesUnusedValue, TestMultipleRules, TestAggressiveConditions

It would be worth investigating whether those are still actually issues with Icarus Verilog. (Or potentially wrapper errors or test misconfiguration on our part!) I see that there are test differences with return values that are (greater than 64 bits) or polymorphic. Although I also a difference in TestValues for functions operating only on 32 bits, which ought to be OK.

If we did remove the warning, then we can remove the filtering of the warning in bsc.options/options.exp.

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