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…>= 0.5 The step kernel sets two trace-time slots while it traces -- the poll-timeout counter pointer (device.TOFLAG) and the stamp hook (stamps.HOOK) -- and clears them when its body ends. They were module-level `[None]` lists. FlyDSL 0.5 traces every kernel in its own MLIRContext, and a launcher that traces several ranks' kernels in parallel threads then hands one thread's IR value to another thread's trace; verification fails with "'llvm.inttoptr' op operand #0 type from a different MLIRContext than this operation". TraceSlot keeps the value per tracing thread behind the same `slot[0]` interface, so serial tracing (FlyDSL 0.4) is unchanged. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Motivation
The gfx1250 single-launch step kernel (DeepSeek-V4.1, PR #3109) does not build with FlyDSL 0.5: tracing fails with
The step kernel sets two trace-time slots while it traces -- the poll-timeout counter pointer (
device.TOFLAG) and the stamp hook (stamps.HOOK) -- and clears them when its body ends. They are module-level[None]lists. FlyDSL 0.5 traces every kernel in its own MLIRContext, and a launcher that traces several ranks' kernels in parallel threads then hands one thread's IR value to another thread's trace. FlyDSL 0.4 used one context, which hid the sharing.Change
device.TraceSlot: one trace-time value private to the tracing thread, with the sameslot[0]interface.TOFLAGandHOOKuse it. Serial tracing (FlyDSL 0.4) is unchanged.Validation
On gfx1250 (CT10, 4 GPUs), the single-launch fixture (40 target + 3 draft layers, TP4, 6 rows) with the same thread-local slots:
gfx1250-atom-k3-20261111image's bundled FlyDSL): builds, runs all iterations, zero poll timeouts.Not covered here: the kernel's performance under FlyDSL 0.5 (the 0.5.0 run's median step was slower than 0.4.1 in this fixture; to be investigated separately).
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