Hi there! 👋 I'm Subham Pal, a final-year undergraduate student in Electronics and Communication Engineering (ECE) at NIT Durgapur. My interests and experience span VLSI, processor design, EDA tool development, and the integration of AI/ML with hardware workflows.

• Custom Silicon & VLSI Enthusiast
  I love building and optimizing hardware from the ground up, including experience in open hardware hackathons, analog front-end design, and processor architecture.

• EDA Tool Development & Open Source
  Currently contributing to the development and maintenance of open-source physical layout tools. I work on enhancing automation for chip design and layout, with a focus on leveraging modern AI/ML techniques to optimize the physical design process.

• Bridging AI and Hardware
  I'm passionate about bringing reinforcement learning and large language models into practical EDA flows—especially automating, evaluating, and generating high-quality datasets for layout optimization.

• RISC-V & Digital Design
  I actively explore processor design and implementation at the RTL and microarchitecture level, with hands-on work on open RISC-V cores and digital systems.

• VLSI Physical Design, Digital & Analog Layout
• Python, Verilog, SystemVerilog
• EDA Tools: OpenROAD, glayout, schematic/layout editors
• AI/ML: Reinforcement Learning, LLMs for design automation
• RISC-V, Custom Processor Development
• Dataset Creation & Evaluation Frameworks

• Built and optimized custom analog front-ends.
• Active member of open-source EDA tool communities, driving innovation at the intersection of AI and hardware.
• Developing automation and evaluation systems for physical layout quality using large-scale datasets and ML models.
• Hands-on experience with RISC-V microarchitecture and open hardware projects.

Always looking to collaborate on open-source hardware, VLSI, and AI-driven EDA projects!