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Roadmap notes #11

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@PaintYourDragon

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@PaintYourDragon

This isn’t really an issue, but putting some future roadmap notes here publicly for anyone’s input if there are different approaches or better ideas.

  • Make an arch directory and split out each architecture from arch.h into its own file. I’d initially pursued this but instead kept it single-file as Murphy’s Law dictates someone will add a new architecture header file and wonder why it’s not working (there’s no wildcard #include). BUT, arch.h is already getting super unwieldy much quicker than expected, so at some point that directory will be added and arch.h will #include every file in it. This will mean editing two files for a new architecture instead of one, I’ll try to be super clear about that both in the guide and code.
  • Library is obscure enough that it might be a good guinea pig for testing “#pragma once” instead of oldschool include guards, see if it rains on anyone’s parade, in which case would switch back.
  • When splitting out architectures, make distinct files for SAMD21 and SAMD51. The two have a lot in common but next item will change that somewhat…
  • Even if an architecture supports an atomic bit-toggle register, might not want to use it. Reason being that (for most efficient memory use) this requires all 6 RGB bits AND the clock bit in the same byte (or word) of a PORT register. If no toggle register, the clock bit can be anywhere in the same PORT, making pin assignments easier. Bit-toggle is worth using on SAMD21 because the CPU clock is 48 MHz and each write op takes only 2 instructions this way…but on every single device faster than that, we’ve had to add NOP instructions to slow it down. So, skip the bit-toggles and some of the NOPs, have more pin freedom.
  • For similar reasons, don’t bother with loop unrolling on faster architectures. Aim for 12-16 MHz clock, anything faster and the matrix can’t keep up. “De-unrolling” the loops should implicitly throttle things back and require fewer NOP shenanigans.

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