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@commodo commodo commented May 9, 2018

Note [Alexandru Ardelean]: the SidekiqZ2 reset pin is an open drain, however it doesn't behave like one when the ad9361_reset() code runs. Because the GPIO_OPEN_DRAIN OF property has the GPIO_ACTIVE_LOW flag, the value is inverted. So, when doing gpiod_set_value(0) the final open-drain code is _gpio_set_open_drain_value(1), which is not what we want.

[ upstream commit 4c0facd ("gpio: core: Decouple open drain/source
flag with active low/high") ]

Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Signed-off-by: Laxman Dewangan [email protected]
Signed-off-by: Linus Walleij [email protected]

…w/high

Note [Alexandru Ardelean]: the SidekiqZ2 reset pin is an open drain,
however it doesn't behave like one when the `ad9361_reset()` code runs.
Because the GPIO_OPEN_DRAIN OF property has the GPIO_ACTIVE_LOW flag, the
value is inverted. So, when doing `gpiod_set_value(0)` the final open-drain
code is `_gpio_set_open_drain_value(1)`, which is not what we want.

[ upstream commit 4c0facd ("gpio: core: Decouple open drain/source
flag with active low/high") ]

Currently, the GPIO interface is said to Open Drain if it is Single
Ended and active LOW. Similarly, it is said as Open Source if it is
Single Ended and active HIGH.

The active HIGH/LOW is used in the interface for setting the pin
state to HIGH or LOW when enabling/disabling the interface.

In Open Drain interface, pin is set to HIGH by putting pin in
high impedance and LOW by driving to the LOW.

In Open Source interface, pin is set to HIGH by driving pin to
HIGH and set to LOW by putting pin in high impedance.

With above, the Open Drain/Source is unrelated to the active LOW/HIGH
in interface. There is interface where the enable/disable of interface
is ether active LOW or HIGH but it is Open Drain type.

Hence decouple the Open Drain with Single Ended + Active LOW and
Open Source with Single Ended + Active HIGH.

Adding different flag for the Open Drain/Open Source which is valid
only when Single ended flag is enabled.

Signed-off-by: Laxman Dewangan <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
@lclausen-adi
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Hm, interesting that they are breaking the ABI.

@commodo commodo force-pushed the backport-open-drain-fix branch from bf3692d to fa5733e Compare May 9, 2018 07:55
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commodo commented May 9, 2018

Chagelog v1 => v2:

  • added comment in commit + PR about why we need this change backported

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commodo commented May 9, 2018

@lclausen-adi yeah it is interesting ; i was a bit puzzled why open-drain wasn't behaving in the kernel as an open drain

i also did a quick grep in our DTs to check that we don't have any other open-drains or open-sources ;
seems this is not a popular setting in DTs.

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commodo commented May 9, 2018

Will merge this later today if no objections

@commodo commodo merged commit 39c8db9 into master May 9, 2018
@commodo commodo deleted the backport-open-drain-fix branch May 9, 2018 09:54
johnathan-convertino-afrl pushed a commit to johnathan-convertino-afrl/linux that referenced this pull request May 21, 2024
…ze (analogdevicesinc#89)

Added a check for AES block mode and param size before the value is send
to secure world. Reject request if block mode or param size is incorrect.

Signed-off-by: Teh Wen Ping <[email protected]>
dbogdan pushed a commit that referenced this pull request Jul 27, 2025
…ze (#89)

Added a check for AES block mode and param size before the value is send
to secure world. Reject request if block mode or param size is incorrect.

Signed-off-by: Teh Wen Ping <[email protected]>
podgori pushed a commit that referenced this pull request Aug 8, 2025
…ze (#89)

Added a check for AES block mode and param size before the value is send
to secure world. Reject request if block mode or param size is incorrect.

Signed-off-by: Teh Wen Ping <[email protected]>
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6 participants