[RTL] AXI USER fixes and updates to mcu_cptra_bringup to execute FW UPD flow

.github/workflow_metadata/pr_hash

@@ -1 +1 @@
-1ce25b861cf5d98155760d20d2d71b2401806145986207b287bdaee5fda70bc6105f87aa1e3efcb25b81df8e18a905bd
+937422d80b009c00e71e14585900ea675ca8525841f0c46b558689e8db2dd583d4c85bb838da725b5b06ef1a93693975

.github/workflow_metadata/pr_timestamp

@@ -1 +1 @@
-1742494801
+1742847313

src/integration/rtl/caliptra_ss_includes.svh

@@ -20,13 +20,11 @@
 
 parameter CPTRA_SS_MCU_LSU_ARID_WIDTH = 8;
 parameter CPTRA_SS_MCU_LSU_AWID_WIDTH = 8;
-parameter CPTRA_SS_MCU_LSU_ARUSER_WIDTH = 8;
-parameter CPTRA_SS_MCU_LSU_AWUSER_WIDTH = 8;
 parameter CPTRA_SS_MCU_IFU_ARID_WIDTH = 8;
 parameter CPTRA_SS_MCU_IFU_AWID_WIDTH = 8;
-parameter CPTRA_SS_MCU_USER_WIDTH = 32;
 
-parameter CPTRA_SS_STRAP_CLPTRA_CORE_AXI_USER   = 32'hFFFF_FFFF;
-parameter CPTRA_SS_STRAP_MCU_LSU_AXI_USER       = 32'h1;
+parameter CPTRA_SS_STRAP_CLPTRA_CORE_AXI_USER   = 32'h3; // FIXME make these values modifiable at run-time for testing
+parameter CPTRA_SS_STRAP_MCU_LSU_AXI_USER       = 32'h1; // FIXME make these values modifiable at run-time for testing
+parameter CPTRA_SS_STRAP_MCU_IFU_AXI_USER       = 32'h2; // FIXME make these values modifiable at run-time for testing
 
 `endif // CPTRA_SS_INCLUDES_SVH

src/integration/rtl/caliptra_ss_top.sv

@@ -124,11 +124,10 @@ module caliptra_ss_top
 `endif
 
 // Caliptra SS MCU 
-    input logic [CPTRA_SS_MCU_USER_WIDTH-1:0] cptra_ss_strap_mcu_lsu_axi_user_i,
-    input logic [CPTRA_SS_MCU_USER_WIDTH-1:0] cptra_ss_strap_mcu_ifu_axi_user_i,
-    input logic [CPTRA_SS_MCU_USER_WIDTH-1:0] cptra_ss_strap_cptra_axi_user_i,
-    input logic [CPTRA_SS_MCU_USER_WIDTH-1:0] cptra_ss_strap_mcu_sram_config_axi_user_i,
-    input logic [CPTRA_SS_MCU_USER_WIDTH-1:0] cptra_ss_strap_mci_soc_config_axi_user_i,
+    input logic [31:0] cptra_ss_strap_mcu_lsu_axi_user_i,
+    input logic [31:0] cptra_ss_strap_mcu_ifu_axi_user_i,
+    input logic [31:0] cptra_ss_strap_mcu_sram_config_axi_user_i,
+    input logic [31:0] cptra_ss_strap_mci_soc_config_axi_user_i,
 
 // Caliptra SS MCI MCU SRAM Interface (SRAM, MBOX0, MBOX1)
     mci_mcu_sram_if.request cptra_ss_mci_mcu_sram_req_if,
@@ -226,6 +225,7 @@ module caliptra_ss_top
     logic                       o_debug_mode_status;
 
     logic                       jtag_tdo;
+    logic                       i_cpu_halt_req;
     logic                       o_cpu_halt_ack;
     logic                       o_cpu_halt_status;
     logic                       o_cpu_run_ack;
@@ -532,9 +532,6 @@ module caliptra_ss_top
     logic payload_available_o;
     logic image_activated_o;
 
-    // tie offs
-        assign reset_vector = `css_mcu0_RV_RESET_VEC;
-
     // MCU DMA AXI Interface - UNUSED
     axi_if #(
         .AW(32), //-- FIXME : Assign a common paramter
@@ -564,12 +561,12 @@ module caliptra_ss_top
 
 
      always_comb begin
-        cptra_ss_mcu_lsu_m_axi_if.awuser                                             = 32'hFFFF_FFFF;
-        cptra_ss_mcu_lsu_m_axi_if.aruser                                             = 32'hFFFF_FFFF;
+        cptra_ss_mcu_lsu_m_axi_if.awuser                                             = cptra_ss_strap_mcu_lsu_axi_user_i;
+        cptra_ss_mcu_lsu_m_axi_if.aruser                                             = cptra_ss_strap_mcu_lsu_axi_user_i;
         cptra_ss_mcu_lsu_m_axi_if.arid[CPTRA_SS_MCU_LSU_ARID_WIDTH-1:pt.LSU_BUS_TAG] = '0; 
         cptra_ss_mcu_lsu_m_axi_if.awid[CPTRA_SS_MCU_LSU_ARID_WIDTH-1:pt.LSU_BUS_TAG] = '0; 
-        cptra_ss_mcu_lsu_m_axi_if.aruser[CPTRA_SS_MCU_LSU_ARUSER_WIDTH-1:0]          = '1;
-        cptra_ss_mcu_lsu_m_axi_if.awuser[CPTRA_SS_MCU_LSU_AWUSER_WIDTH-1:0]          = '1;
+        cptra_ss_mcu_ifu_m_axi_if.awuser                                             = cptra_ss_strap_mcu_ifu_axi_user_i;
+        cptra_ss_mcu_ifu_m_axi_if.aruser                                             = cptra_ss_strap_mcu_ifu_axi_user_i;
         cptra_ss_mcu_ifu_m_axi_if.arid[CPTRA_SS_MCU_IFU_ARID_WIDTH-1:pt.IFU_BUS_TAG] = '0;
         cptra_ss_mcu_ifu_m_axi_if.awid[CPTRA_SS_MCU_IFU_ARID_WIDTH-1:pt.IFU_BUS_TAG] = '0;
 
@@ -960,13 +957,13 @@ module caliptra_ss_top
         .mpc_debug_run_ack      ( mpc_debug_run_ack),
         .mpc_debug_run_req      ( 1'b1),
         .mpc_reset_run_req      ( 1'b1),             // Start running after reset
-        .debug_brkpt_status    (debug_brkpt_status),
+        .debug_brkpt_status     (debug_brkpt_status),
+        .o_debug_mode_status    (o_debug_mode_status),
 
-        .i_cpu_halt_req         ( 1'b0  ),    // Async halt req to CPU
+        .i_cpu_halt_req         ( i_cpu_halt_req ),    // Async halt req to CPU
         .o_cpu_halt_ack         ( o_cpu_halt_ack ),    // core response to halt
         .o_cpu_halt_status      ( o_cpu_halt_status ), // 1'b1 indicates core is halted
         .i_cpu_run_req          ( 1'b0  ),     // Async restart req to CPU
-        .o_debug_mode_status    (o_debug_mode_status),
         .o_cpu_run_ack          ( o_cpu_run_ack ),     // Core response to run req
 
         .dec_tlu_perfcnt0       (),
@@ -1175,7 +1172,11 @@ module caliptra_ss_top
 
         .strap_mcu_reset_vector(cptra_ss_strap_mcu_reset_vector_i),
 
-        .mcu_reset_vector(),
+        .mcu_reset_vector(reset_vector),
+        // MCU Halt Signals
+        .mcu_cpu_halt_req_o   (i_cpu_halt_req   ),
+        .mcu_cpu_halt_ack_i   (o_cpu_halt_ack   ),
+        .mcu_cpu_halt_status_i(o_cpu_halt_status),
 
         .mcu_no_rom_config(cptra_ss_mcu_no_rom_config_i),
 

src/integration/test_suites/cptra_ss_i3c_recovery/cptra_ss_i3c_recovery.c

@@ -243,7 +243,7 @@ void boot_mcu(){
     VPRINTF(LOW, "MCU: Ready for FW\n");
 
     // MBOX: Setup valid AXI USER
-    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_0, 0xffffffff);
+    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_0, 0x1); // LSU AxUSER value. TODO: Derive from parameter
     //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_1, 1);
     //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_2, 2);
     //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_3, 3);

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.c

@@ -20,22 +20,46 @@
 #include "caliptra_ss_lc_ctrl_address_map.h"
 #include "riscv_hw_if.h"
 
+inline void mcu_sleep (const uint32_t cycles) {
+    for (uint8_t ii = 0; ii < cycles; ii++) {
+        __asm__ volatile ("nop"); // Sleep loop as "nop"
+    }
+}
+
 void reset_rtl(void) {
     uint32_t reg_value;
 
     reg_value = lsu_read_32(LC_CTRL_HW_REVISION0_OFFSET); // Reset the lcc and its bfm
     VPRINTF(LOW, "LCC & Fuse_CTRL is under reset!\n");
-    for (uint16_t ii = 0; ii < 160; ii++) {
-        __asm__ volatile ("nop"); // Sleep loop as "nop"
-    }
+    mcu_sleep(160);
 }
 
 void mcu_mci_boot_go() {
+    // Configure EXEC Region before initializing Caliptra
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_FW_SRAM_EXEC_REGION_SIZE , 100);
+    VPRINTF(LOW, "MCU: Configure EXEC REGION Size\n");
+
     // writing SOC_MCI_TOP_MCI_REG_CPTRA_BOOT_GO register of MCI for CPTRA Boot FSM to bring Caliptra out of reset
     lsu_write_32(SOC_MCI_TOP_MCI_REG_CPTRA_BOOT_GO, 1);
     VPRINTF(LOW, "MCU: Writing MCI SOC_MCI_TOP_MCI_REG_CPTRA_BOOT_GO\n");
 }
 
+void mcu_mci_poll_exec_lock() {
+    uint32_t rg;
+    uint32_t cnt = 0;
+    do {
+        mcu_sleep(64);
+        if (!(cnt++ & 0xf)) {
+            VPRINTF(MEDIUM, " * poll ex lk %x\n", cnt);
+        }
+        rg = lsu_read_32(SOC_MCI_TOP_MCI_REG_INTR_BLOCK_RF_NOTIF0_INTERNAL_INTR_R) & MCI_REG_INTR_BLOCK_RF_NOTIF0_INTERNAL_INTR_R_NOTIF_CPTRA_MCU_RESET_REQ_STS_MASK;
+    } while(rg != MCI_REG_INTR_BLOCK_RF_NOTIF0_INTERNAL_INTR_R_NOTIF_CPTRA_MCU_RESET_REQ_STS_MASK);
+}
+
+void mcu_mci_req_reset() {
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_RESET_REQUEST, MCI_REG_RESET_REQUEST_MCU_REQ_MASK);
+}
+
 void mcu_cptra_fuse_init() {
     enum boot_fsm_state_e boot_fsm_ps;
 
@@ -53,9 +77,7 @@ void mcu_cptra_fuse_init() {
     // Wait for Boot FSM to stall (on breakpoint) or finish bootup
     boot_fsm_ps = (lsu_read_32(SOC_SOC_IFC_REG_CPTRA_FLOW_STATUS) & SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK) >> SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW;
     while(boot_fsm_ps != BOOT_DONE && boot_fsm_ps != BOOT_WAIT) {
-        for (uint8_t ii = 0; ii < 16; ii++) {
-            __asm__ volatile ("nop"); // Sleep loop as "nop"
-        }
+        mcu_sleep(16);
         boot_fsm_ps = (lsu_read_32(SOC_SOC_IFC_REG_CPTRA_FLOW_STATUS) & SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_MASK) >> SOC_IFC_REG_CPTRA_FLOW_STATUS_BOOT_FSM_PS_LOW;
     }
 
@@ -69,7 +91,7 @@ void mcu_cptra_fuse_init() {
 
 void mcu_cptra_user_init() {
     // MBOX: Setup valid AXI USER
-    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_0, 0xffffffff); // FIXME this should come from a param for LSU AxUSER
+    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_0, 0x1); // FIXME this should come from a param for LSU AxUSER
 //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_1, 1);
 //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_2, 2);
 //    lsu_write_32(SOC_SOC_IFC_REG_CPTRA_MBOX_VALID_AXI_USER_3, 3);
@@ -84,9 +106,7 @@ void mcu_cptra_user_init() {
 void mcu_cptra_poll_mb_ready() {
     // MBOX: Wait for ready_for_mb_processing
     while(!(lsu_read_32(SOC_SOC_IFC_REG_CPTRA_FLOW_STATUS) & SOC_IFC_REG_CPTRA_FLOW_STATUS_READY_FOR_MB_PROCESSING_MASK)) {
-        for (uint8_t ii = 0; ii < 16; ii++) {
-            __asm__ volatile ("nop"); // Sleep loop as "nop"
-        }
+        mcu_sleep(16);
     }
     VPRINTF(LOW, "MCU: Ready for FW\n");
 }
@@ -133,9 +153,7 @@ void mcu_cptra_mbox_cmd() {
 
     // MBOX: Poll status
     while(((lsu_read_32(SOC_MBOX_CSR_MBOX_STATUS) & MBOX_CSR_MBOX_STATUS_STATUS_MASK) >> MBOX_CSR_MBOX_STATUS_STATUS_LOW) != DATA_READY) {
-        for (uint8_t ii = 0; ii < 16; ii++) {
-            __asm__ volatile ("nop"); // Sleep loop as "nop"
-        }
+        mcu_sleep(16);
     }
     VPRINTF(LOW, "MCU: Mbox response ready\n");
 

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.h

@@ -19,6 +19,8 @@
 
 void reset_rtl(void);
 void mcu_mci_boot_go();
+void mcu_mci_poll_exec_lock();
+void mcu_mci_req_reset();
 void mcu_cptra_fuse_init();
 void mcu_cptra_user_init();
 void mcu_cptra_poll_mb_ready();

src/integration/test_suites/libs/riscv_hw_if/link.ld

@@ -23,21 +23,17 @@ SECTIONS {
   . = 0x50000000;
   .dccm : { *(.dccm) }
   _dccm_end = .;
-
-  . = 0x80000000;
-  .text   : { *(.text*) }
-  _text_end = .;
-
-  . = 0x21C00000;
   .data : { *(.*data) *(.rodata*) *(.srodata*) }
   _data_end = .;
-
-  . = 0x21C10000;
   .bss : { *(.bss) *(.sbss) }
   _bss_end = .;
 
   STACK = ALIGN(16) + 0x1000;
-
+
+  . = 0x80000000;
+  .text   : { *(.text*) }
+  _text_end = .;
+
   . = 0x21000414;
   .data.io : { *(.data.io) }
 }