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* added caliptra+mcu UDS c test * caliptra-rom is implemented with C test * updated uds based addr * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/ekarabulut/caliptra_JTAG_manuf' with updated timestamp and hash after successful run * added manuf smoke test * updated uds_test for full fuse write * adjusted completion time of tcl * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/ekarabulut/caliptra_JTAG_manuf' with updated timestamp and hash after successful run * added header comments * MICROSOFT AUTOMATED PIPELINE: Stamp 'user/dev/ekarabulut/caliptra_JTAG_manuf' with updated timestamp and hash after successful run
* Enable assertions for SS Integration TB * Merge with TOT * Add missing driver for rst_mbox_lock_req There was a bad merge that didn't cause regressions to fail. Added back the missing logic * Add WUSER driver in LCC and FC We either need to verify these tieoffs of connect them to AXI interconnect * MICROSOFT AUTOMATED PIPELINE: Stamp 'ckuchta-mcu-sram-val' with updated timestamp and hash after successful run * Remove old assertions * Remove stale LIBS_MCI_DIR now in COMP_LIB_NAMES * Add back sb_axi_wvalid port connection to MCU Inadvertently removed this port in caliptra_ss_top.sv * Clean up AXI user connections at SS top Moved all user connections to a single location. Also, removed the MCU DMA AXI IF since it is unused in our design and reduce overhead of maintaining connections to MCU DMA that is unused plus having to add tieoffs to an interface that is unused. * Enable RUSER in axi interconnect * Add MCU hitless update hanshake to CSS HW spec and strap restrictions * Update MCI Boot FSM with MCU halt handshake states Halt handshake is needed to ensure MCU is halted and idle before reset is asserted. Otherwise there could be outstanding AXI transaction when MCU is reset by MCI. * Add halt/ack handshake between MCU and MCI * change "warm reset" to "cold reset" for MCI boot update We have a bug where FW_BOOT_UPD_RESET should be tracking the first update since cold reset, not warm reset. Updated the spec to match what HW should be doing. * Revert back cold reset to warm reset in MCI reset reason register I believe we should be tracking warm reset since Caliptra is reset on MCI warm reset and the FW_EXEC register is reset on warm reset. * Update docs/CaliptraSSHardwareSpecification.md Co-authored-by: Caleb <11879229+calebofearth@users.noreply.github.com> * Update docs/CaliptraSSHardwareSpecification.md Co-authored-by: Caleb <11879229+calebofearth@users.noreply.github.com> * Update docs/CaliptraSSHardwareSpecification.md Co-authored-by: Caleb <11879229+calebofearth@users.noreply.github.com> * Fix grammar per PR review * Clarify hitless update types * Add MCU MBOX Tests and Fix MBOX Lock Clearing Detection (#181) * -Fix mailbox release detection to be based on valid SW write and data being 0 (instead of value edge detect). -Update MBOX clearing to explicitly call out writing 0 to EXECUTE register. * -Add MCU MBOX smoke test with MCU and Caliptra both acquiring and reading/writing MBOX. -Add MCU MBOX lock return one during zeroize test. -Update MCU MBOX zeroize smoke test for new infra. -Add MCU MBOX tests to L0. * -Add MBOX CSRs are zero after lock release test. -Fix mbox_status CSR to reset on MBOX lock release. * Remove OtpKeymgrKeyKnown_A assertion since otp_broadcast_o doesn't exist * Fix Caliptra SS assertions Include caliptra_ss_assertion_overrides.svh in caliptra_ss_top_tb.sv. I think it was removed with a merge. Disable additional assertsions showing up in a TB Fuse module with a FIXME to remove and tagged with a github issue. * Fix decode issue where MBOX1 was granted when MBOX0 targeted * Fix build issue, duplicate assertion names * MICROSOFT AUTOMATED PIPELINE: Stamp 'ckuchta-mcu-sram-val' with updated timestamp and hash after successful run --------- Co-authored-by: Caleb <11879229+calebofearth@users.noreply.github.com> Co-authored-by: kedjenks <kedjenks@gmail.com>
* Initial test code for bringup with local caliptra-core images * Ending quote - syntax * Reorganize ai3c tests * Rename ai3ct test as svh, since it's an include * Add a top-level include file that grabs all css ai3c tests * Remove recipe for program.hex * Add caliptra subsystem macro to compile.yml; update test-suites with plusargs/pre_exec * Fix user signals and config so design boots with Caliptra ROM * Use DEBUG_OUT as STDOUT in ss sims * Regenerate RDL files and update workflow to catch out of date RDL * Unique AxUSER for Caliptra, MCU-LSU, and MCU-IFU * Fixes to get cptra_ss_i3c_recovery pre-exec working * Initialize data/bss/STACK to DCCM, as the MCU SRAM is locked at startup * Remove cptra AxUSER force; TMP: set cptra AxUSER as SOC CONFIG user * Update RTL submodule to pull fw_test_rom updates * Add explanatory note/TODO on LSU user * Revert changes to mcu_hello_world -- it's a defunct test * Makefile cleanup * Rename top test list file * Reorganize the libs area * Move mcu bringup tasks to shared lib file; update Makefile to init data to DCCM and build libs * Roll back the USER/linker modifications to isolate just the methodology changes * Update testfile yml for all smoke tests * Whitespace * Hello world testcase that shows caliptra-core fw built from caliptra-ss repo * Don't build caliptra_isr for MCU - that's a caliptra-core file * Revert USER changes in i3c test * MICROSOFT AUTOMATED PIPELINE: Stamp 'cwhitehead-msft-local-testcode-PoC' with updated timestamp and hash after successful run * I3C reg rd wr and caliptra streaming boot test rom * Removed the global switch * resolved conflicts. * Resolved conflicts. * Reg read write test updated to read and or write all the reg * Added Streaming boot random test * Added updates for Random and reg read write test * Cleanup commit * Removed Debug log * Updated for randomized block size * Add MCU MBOX Tests and Fix MBOX Lock Clearing Detection (#181) * -Fix mailbox release detection to be based on valid SW write and data being 0 (instead of value edge detect). -Update MBOX clearing to explicitly call out writing 0 to EXECUTE register. * -Add MCU MBOX smoke test with MCU and Caliptra both acquiring and reading/writing MBOX. -Add MCU MBOX lock return one during zeroize test. -Update MCU MBOX zeroize smoke test for new infra. -Add MCU MBOX tests to L0. * -Add MBOX CSRs are zero after lock release test. -Fix mbox_status CSR to reset on MBOX lock release. * Added support for Caliptra Test build in Makefile vcs * Disabled internal scoreboard for VIP --------- Co-authored-by: Caleb Whitehead <cwhitehead@microsoft.com> Co-authored-by: kedjenks <kedjenks@gmail.com>
* Replace instances of the deprecated var CALIPTRA_SS with CALIPTRA_SS_ROOT (removes duplicate variables) * Remove duplicate macros * Document sim-flow, env var setup, and AXI4PC requirement * Formatting updates regarding note on AXI4PC * Clarification on axi4pc version * Fix a grammar error * Apply suggested updates to text about acquiring Axi4PC Co-authored-by: Steven Bellock <sbellock@nvidia.com> * Run RDL check for all PRs, not just to main * Document that some CALIPTRA_TESTNAME code may be in its own directory in caliptra-ss * Regenerate reg map --------- Co-authored-by: Steven Bellock <sbellock@nvidia.com>
* instantiate mci coverage bind file in ss top tb * fix typo in ss top tb
bharatpillilli
previously approved these changes
Mar 29, 2025
Generate caliptra_ss_clk_freq.h every build through the Makefile instead of running the gen_clk_freq_file.sh in yml files. WUSER was not connected to I3C module.
…ted timestamp and hash after successful run
bharatpillilli
approved these changes
Mar 31, 2025
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