[VAL] Add MCU SRAM Byte Test and Prot Region Test

src/integration/stimulus/L0_Promote_caliptra_ss_top_tb_regression.yml

@@ -27,3 +27,5 @@ contents:
         - ../test_suites/caliptra_ss_fuse_ctrl_zeroization/caliptra_ss_fuse_ctrl_zeroization.yml
         - ../test_suites/smoke_test_mcu_mbox_valid_user/smoke_test_mcu_mbox_valid_user.yml
         - ../test_suites/smoke_test_mcu_mbox_write_user_lock/smoke_test_mcu_mbox_write_user_lock.yml
+        - ../test_suites/smoke_test_mcu_sram_byte_write/smoke_test_mcu_sram_byte_write.yml
+        - ../test_suites/smoke_test_mcu_sram_protected_region/smoke_test_mcu_sram_protected_region.yml

src/integration/stimulus/testsuites/caliptra_ss_master_test_list.csv

@@ -26,3 +26,5 @@ $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_axi_id/calip
 $CALIPTRA_SS_ROOT/src/integration/test_suites/caliptra_ss_fuse_ctrl_zeroization/caliptra_ss_fuse_ctrl_zeroization                       , Directed       , Nightly       , L0  , L1  , caliptra_ss_top_tb, Promote        , None     , 100
 $CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_mcu_mbox_valid_user/smoke_test_mcu_mbox_valid_user                             , None           , None          , L0  , None, caliptra_ss_top_tb, Promote        , None     , 100
 $CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_mcu_mbox_write_user_lock/smoke_test_mcu_mbox_write_user_lock                   , None           , None          , L0  , None, caliptra_ss_top_tb, Promote        , None     , 100
+$CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_mcu_sram_byte_write/smoke_test_mcu_sram_byte_write                             , Directed       , None          , L0  , None, caliptra_ss_top_tb, Promote        , None     , 100
+$CALIPTRA_SS_ROOT/src/integration/test_suites/smoke_test_mcu_sram_protected_region/smoke_test_mcu_sram_protected_region                 , Random         , Nightly       , L0  , L1  , caliptra_ss_top_tb, Promote        , None     , 100

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.c

@@ -52,10 +52,39 @@ void reset_fc_lcc_rtl(void) {
     mcu_sleep(160);
 }
 
-void mcu_mci_boot_go() {
+void write_read_check(uintptr_t rdptr, uint32_t data){
+    VPRINTF(LOW, "write_read_check: Address: 0x%x -- Data: 0x%x\n", rdptr, data);
+
+    lsu_write_32(rdptr, data);
+
+    read_check(rdptr, data);
+
+}
+
+uintptr_t get_random_address(uint32_t rnd, uintptr_t start_address, uintptr_t end_address) {
+    // Return address that is DWORD aligned
+    uintptr_t range = end_address - start_address + 1;
+    uintptr_t offset = rnd % range;
+    uintptr_t address = (start_address + offset) & ~3;
+    return address;
+}
+
+void read_check(uintptr_t rdptr, uint32_t expected_rddata){
+    uint32_t data;
+    data = lsu_read_32(rdptr);
+    VPRINTF(LOW, "read_check: Address: 0x%x -- Expected: 0x%x Actual: 0x%x\n", rdptr, expected_rddata, data);
+    if (expected_rddata != data) {
+        VPRINTF(FATAL, "MCU: FATAL - read_check: Data mismatch at address: 0x%x -- Expected: 0x%x Actual: 0x%x\n", rdptr, expected_rddata, data);
+        SEND_STDOUT_CTRL(0x1);
+        while(1);
+    }
+}
+
+
+void mcu_mci_boot_go(uint32_t mcu_sram_exec_size) {
 
     // Configure EXEC Region before initializing Caliptra
-    lsu_write_32(SOC_MCI_TOP_MCI_REG_FW_SRAM_EXEC_REGION_SIZE , 100);
+    lsu_write_32(SOC_MCI_TOP_MCI_REG_FW_SRAM_EXEC_REGION_SIZE , mcu_sram_exec_size);
     VPRINTF(LOW, "MCU: Configure EXEC REGION Size\n");
 
 
@@ -134,6 +163,14 @@ void mcu_cptra_fuse_init_axi_user(uint32_t cptra_axi_user){
     mcu_cptra_advance_brkpoint();
 }
 
+void mcu_cptra_full_init(uint32_t mcu_sram_exec_size, uint32_t cptra_axi_user) {
+
+    mcu_mci_boot_go(mcu_sram_exec_size);
+
+    mcu_cptra_fuse_init_axi_user(cptra_axi_user);
+
+}
+
 void mcu_cptra_fuse_init() {
     enum boot_fsm_state_e boot_fsm_ps;
 
@@ -470,7 +507,7 @@ void boot_mcu(){
     uint32_t cptra_boot_go;
     uint32_t reg_data_32;
 
-    mcu_mci_boot_go();
+    mcu_mci_boot_go(100);
 
     ////////////////////////////////////
     // Fuse and Boot Bringup
@@ -567,4 +604,4 @@ void boot_mcu(){
 
     VPRINTF(LOW, "MCU: Configured MBOX Valid AXI USER\n");
 
-}
+}

src/integration/test_suites/libs/caliptra_ss_lib/caliptra_ss_lib.h

@@ -28,9 +28,11 @@ void mcu_cptra_wait_for_fuses() ;
 void mcu_cptra_set_fuse_done() ;
 void mcu_cptra_advance_brkpoint() ;
 void mcu_cptra_fuse_init_axi_user(uint32_t cptra_axi_user);
-void mcu_mci_boot_go();
+void mcu_mci_boot_go(uint32_t mcu_sram_exec_size);
+void read_check(uintptr_t rdptr, uint32_t expected_rddata);
 void mcu_mci_poll_exec_lock();
 void mcu_mci_req_reset();
+void mcu_cptra_full_init(uint32_t mcu_sram_exec_size, uint32_t cptra_axi_user);
 void mcu_cptra_fuse_init();
 void mcu_cptra_user_init();
 void mcu_cptra_poll_mb_ready();
@@ -48,6 +50,9 @@ void mcu_mbox_configure_valid_axi(uint32_t mbox_num, uint32_t *axi_user_id);
 bool mcu_mbox_acquire_lock(uint32_t mbox_num, uint32_t attempt_count);
 bool mcu_mbox_wait_for_user_to_be_mcu(uint32_t mbox_num, uint32_t attempt_count);
 void mcu_mbox_clear_mbox_cmd_avail_interrupt(uint32_t mbox_num);
+void write_read_check(uintptr_t rdptr, uint32_t data);
+uintptr_t get_random_address(uint32_t rnd, uintptr_t start_address, uintptr_t end_address);
+
 
 #define FC_LCC_CMD_OFFSET 0xB0
 #define CMD_FC_LCC_RESET                FC_LCC_CMD_OFFSET + 0x02
@@ -62,6 +67,9 @@ void mcu_mbox_clear_mbox_cmd_avail_interrupt(uint32_t mbox_num);
 #define CMD_FC_TRIGGER_ESCALATION       FC_LCC_CMD_OFFSET + 0x0b
 
 
+#define MCU_MBOX_NUM_STRIDE             (SOC_MCI_TOP_MCU_MBOX1_CSR_BASE_ADDR - SOC_MCI_TOP_MCU_MBOX0_CSR_BASE_ADDR)
+#define MCU_MBOX_AXI_CFG_STRIDE         (SOC_MCI_TOP_MCI_REG_MBOX1_AXI_USER_LOCK_0 - SOC_MCI_TOP_MCI_REG_MBOX0_AXI_USER_LOCK_0)
+
 #define MCU_MBOX_NUM_STRIDE             (SOC_MCI_TOP_MCU_MBOX1_CSR_BASE_ADDR - SOC_MCI_TOP_MCU_MBOX0_CSR_BASE_ADDR)
 #define MCU_MBOX_AXI_CFG_STRIDE         (SOC_MCI_TOP_MCI_REG_MBOX1_AXI_USER_LOCK_0 - SOC_MCI_TOP_MCI_REG_MBOX0_AXI_USER_LOCK_0)
 

src/integration/test_suites/libs/mci/mci.c

@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: Apache-2.0
+// Copyright 2020 Western Digital Corporation or its affiliates.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+#include "mci.h"
+#include "soc_address_map.h"
+#include "printf.h"
+#include "riscv_hw_if.h"
+#include "string.h"
+#include "stdint.h"
+#include <stdbool.h>
+
+uint32_t get_mcu_sram_size(){
+    return (lsu_read_32(SOC_MCI_TOP_MCI_REG_HW_CONFIG1)  & MCI_REG_HW_CONFIG1_MCU_SRAM_SIZE_MASK) >> MCI_REG_HW_CONFIG1_MCU_SRAM_SIZE_LOW;
+}
+
+uint32_t get_mcu_sram_size_byte(){
+    return get_mcu_sram_size() * 1024;
+}
+
+uint32_t get_mcu_sram_end_addr(){
+   return SOC_MCI_TOP_MCU_SRAM_BASE_ADDR + get_mcu_sram_size_byte() - 1;
+
+}
+
+uint32_t get_mcu_sram_last_dword(){
+    return get_mcu_sram_end_addr() & ~3;
+}
+
+uint32_t get_mcu_sram_execution_region_start() {
+    return SOC_MCI_TOP_MCU_SRAM_BASE_ADDR;
+}
+
+uint32_t get_mcu_sram_execution_region_end() {
+    uint32_t fw_exec_region;
+
+    fw_exec_region = lsu_read_32(SOC_MCI_TOP_MCI_REG_FW_SRAM_EXEC_REGION_SIZE) + 1; // BASE 0 so add 1 for any calculations
+
+    return get_mcu_sram_execution_region_start() + (fw_exec_region * 4 * 1024) -1;
+
+}
+
+uint32_t get_fw_sram_exec_region_less_than_sram_size(uint32_t rnd){
+    uint32_t mask_rnd = rnd & MCI_REG_FW_SRAM_EXEC_REGION_SIZE_SIZE_MASK;
+    uint32_t sram_size = get_mcu_sram_size();
+    uint32_t fw_sram_exec_region = (mask_rnd % sram_size) >> 4;
+    return fw_sram_exec_region;
+}
+
+bool get_is_sram_protected_region(){
+    return get_mcu_sram_protection_region_start() <= get_mcu_sram_end_addr();
+}
+
+uint32_t get_mcu_sram_protection_region_start() {
+    return get_mcu_sram_execution_region_end() + 1;
+}
+
+uint32_t get_mcu_sram_protection_region_end() {
+   return get_mcu_sram_end_addr();
+
+}
+

src/integration/test_suites/libs/mci/mci.h

@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: Apache-2.0
+//
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+
+#ifndef MCI_LIB
+#define MCI_LIB
+
+#include <stdbool.h>
+#include "stdint.h"
+
+uint32_t get_mcu_sram_size();
+
+uint32_t get_mcu_sram_size_byte();
+
+uint32_t get_mcu_sram_end_addr();
+
+uint32_t get_mcu_sram_last_dword();
+
+uint32_t get_mcu_sram_execution_region_start() ;
+
+uint32_t get_mcu_sram_execution_region_end() ;
+
+uint32_t get_mcu_sram_protection_region_start() ;
+
+uint32_t get_mcu_sram_protection_region_end() ;
+
+bool get_is_sram_protected_region();
+
+uint32_t get_fw_sram_exec_region_less_than_sram_size(uint32_t rnd);
+
+#endif // MCI_LIB