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[VAL] I3C Tests update #651

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Merged
nileshbpat merged 2 commits into from
Aug 24, 2025
Merged

[VAL] I3C Tests update #651

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dddb503
Updated i3c tests
Aug 22, 2025
62d2861
MICROSOFT AUTOMATED PIPELINE: Stamp 'pateln_i3c_test_fix' with update…
Aug 22, 2025
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2 changes: 1 addition & 1 deletion .github/workflow_metadata/pr_hash
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f5da7ced880ec665dfe286b198cced5779b3421bde749bd06800298bb2cb090016349d9ddbf3ee314e36d7c6c78438e2
bdfbdb08f9825b8102f43f670a2e868cc4b1593753466fe0baaf1bf62c0d82a4cc99e85d562f23ab3ab1029d47957d31
2 changes: 1 addition & 1 deletion .github/workflow_metadata/pr_timestamp
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2 changes: 1 addition & 1 deletion ...st_suites/cptra_test_rom_streaming_boot_mcu_sram/cptra_test_rom_streaming_boot_mcu_sram.c
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Expand Up @@ -212,7 +212,7 @@ void read_image_from_fifo(uint32_t fw_image_size) {

// Program DMA to read the payload from the FIFO
VPRINTF(LOW, "CPTRA: Programming DMA to read DWORDS : 'h %0x , 'd %0d \n", fw_image_size, fw_image_size);
soc_ifc_axi_dma_send_axi_to_axi(SOC_I3CCSR_I3C_EC_SECFWRECOVERYIF_INDIRECT_FIFO_DATA, 0, ss_mci_sram_base_addr, 1, fw_image_size*4, dma_block_size);
soc_ifc_axi_dma_send_axi_to_axi(SOC_I3CCSR_I3C_EC_SECFWRECOVERYIF_INDIRECT_FIFO_DATA, 0, ss_mci_sram_base_addr, 1, fw_image_size*4, dma_block_size, 0, 0);
VPRINTF(LOW, "CPTRA: reading I3C FIFO and storing the data in MCU SRAM\n");

}
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4 changes: 2 additions & 2 deletions src/integration/testbench/caliptra_ss_top_tb.sv
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Expand Up @@ -1460,8 +1460,8 @@ module caliptra_ss_top_tb

// run test for i3C
if($value$plusargs("AVY_TEST=%s", avy_test_name)) begin
$display("Waiting for 400us before Running I3C test [%s]", avy_test_name);
#400us; // system boot delay
$display("Waiting for 500us before Running I3C test [%s]", avy_test_name);
#500us; // system boot delay
i3c_env0.sb.enable_sb=0;
master0.set("start_bfm");
ai3c_run_test(avy_test_name, i3c_env0);
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