codegen should allow optional CPU features

[stakach]

I am not sure if this is an issue on x86_64 too but it would be nice to be able to compile code with instructions that the current CPU doesn't support as for SIMD it'll be a runtime check to see if we can execute those instructions.

https://github.com/spider-gazelle/simd/actions/runs/21024822417/job/60446724131

The issue we're seeing here is that the Mac M chips don't support SVE or SVE2 instructions, only NEON.
We're checking at runtime what is supported and using the compatible code path.

https://github.com/spider-gazelle/simd/blob/main/src/simd.cr#L67-L78

So really we should only warn if there are incompatible instructions as it might be deliberate.

[stakach]

I looked into how rust does this for its STD lib SIMD library:

Rust does per-function ISA enabling: #[target_feature(enable = "...")]
Rust can attach target features to just one function. LLVM then allows those instructions only inside that function.

This seems like a good path for crystal to take too as LLVM might use features globally if we enable it for a full build using
crystal build examples/benchmarker.cr -D sve --mattr=+sve2
which seems to be the way to allow SVE extensions when compiling code

[stakach]

So I am thinking we add to the built in annotations with:

types["TargetFeatures"] = @target_features_annotation = AnnotationType.new self, self, "TargetFeatures"
types["TargetCPU"]      = @target_cpu_annotation      = AnnotationType.new self, self, "TargetCPU"

And then update codegen/fun.cr with:

features = target_def.target_features?
cpu      = target_def.target_cpu?

if features || cpu
  # Make it a hard boundary
  context.fun.add_attribute LLVM::Attribute::NoInline

  context.fun.add_target_dependent_attribute("target-features", features) if features
  context.fun.add_target_dependent_attribute("target-cpu", cpu) if cpu
end

And also need to update these parts:
function properties
applying properties

I'll create a pull request, just documenting what I think needs to be updated.

The end goal will be something like:

@[TargetFeatures("+sve")]
def function_with_optional_arm_cpu_extension
  asm("
    ptrue p0.s
    cntw  x8
  " ::: "volatile")
end

[straight-shoota]

Thanks for bringing this topic up!
This proposal might be a bit too concrete, though. I think we should probably look a bit more closely on the usage side first, before discussing a specific implementation. It's good to have #16571 as a proof of concept, though.

[ysbaddaden]

Related (somehow):

• Support SIMD #3057
• Expose CPU model (and features?) as compile time flags #14524

If I understand the problem correctly:

LLVM refuses to compile assembly instructions when we don't pass the related CPU feature (--mattr=+sve) or a CPU model that doesn't include the feature (--mcpu=...). Doing either would enable the feature globally and LLVM would use it everywhere it can during optimizations, so the final executable would require the feature, which is the exact opposite of the expected result: call this or that function using a runtime check of actually supported CPU features.

You thus need to tell LLVM to enable CPU features scoped to specific functions only, which sounds reasonable. Annotations also sound good.

Yet, before rushing to a solution. How do other languages than Rust handle this? Clang, Go, Zig for example?

[ysbaddaden]

As a convoluted workaround for today: you can split the functions to multiple crystal files (as fun), "cross compile" each object file with some CPU features, and link/call 'em through a lib definition.

[stakach]

Zig requires separate code + object files each compiled separately with the correct flags and then the object files are linked

The Go toolchain does not try to validate ISA legality across the whole module the way LLVM does for inline asm. Go also has its own assembly language which is never validated against CPU feature sets.

Clang / c does it in a similar way to rust / crystal annotations

__attribute__((target("avx2")))
void add_avx2(float *a, float *b, float *c, int n) {
}