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[Intel] Adding technologies: VMD, HDCP, IPU and VPU
* Volume Management Device * High-Bandwidth Digital Content Protection * Image Processing Unit * Vision Processing Unit
1 parent 23a01f4 commit 18d3229

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9 files changed

+92
-6
lines changed

9 files changed

+92
-6
lines changed

‎x86_64/corefreq-cli-json.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1531,9 +1531,16 @@ void JsonSysInfo(RO(SHM_STRUCT) *RO(Shm))
15311531
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.L2_UpDown_Pf);
15321532
json_key(&s, "LLC_Streamer");
15331533
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.LLC_Streamer);
1534+
json_key(&s, "VMD");
1535+
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.VMD);
15341536
json_key(&s, "GNA");
15351537
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.GNA);
1536-
1538+
json_key(&s, "HDCP");
1539+
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.HDCP);
1540+
json_key(&s, "IPU");
1541+
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.IPU);
1542+
json_key(&s, "VPU");
1543+
json_literal(&s, "%llu", RO(Shm)->Proc.Technology.VPU);
15371544

15381545
json_end_object(&s);
15391546
}

‎x86_64/corefreq-cli-rsc-en.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1241,7 +1241,13 @@
12411241
#define RSC_TECHNOLOGIES_R2H_CODE_EN "Race To Halt Optimization"
12421242
#define RSC_TECHNOLOGIES_HYPERV_CODE_EN "Hypervisor"
12431243
#define RSC_TECHNOLOGIES_WDT_CODE_EN "Watchdog Timer"
1244+
#define RSC_TECHNOLOGIES_VMD_CODE_EN "Volume Management Device"
12441245
#define RSC_TECHNOLOGIES_GNA_CODE_EN "Gaussian & Neural Accelerator"
1246+
#define RSC_TECHNOLOGIES_HDCP_CODE_EN \
1247+
"High-Bandwidth Digital Content Protection"
1248+
1249+
#define RSC_TECHNOLOGIES_IPU_CODE_EN "Image Processing Unit"
1250+
#define RSC_TECHNOLOGIES_VPU_CODE_EN "Vision Processing Unit"
12451251

12461252
#define RSC_TECH_AMD_CPB_COMM_CODE_EN " Hardware Configuration::CpbDis "
12471253
#define RSC_TECH_INTEL_EEO_COMM_CODE_EN " Skylake::Power Control::EEO_Disable "

‎x86_64/corefreq-cli-rsc-fr.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -715,9 +715,18 @@ do echo -en "$h$l\t""\xc3""\x$h$l""\t"; done; done;echo
715715
#define RSC_TECHNOLOGIES_R2H_CODE_FR "Optimisation Race To Halt"
716716
#define RSC_TECHNOLOGIES_HYPERV_CODE_FR "Hyperviseur"
717717
#define RSC_TECHNOLOGIES_WDT_CODE_FR "Compteur Watchdog"
718+
#define RSC_TECHNOLOGIES_VMD_CODE_FR \
719+
"P""\xa9""riph""\xa9""rique de gestion de volume"
720+
718721
#define RSC_TECHNOLOGIES_GNA_CODE_FR \
719722
"Acc""\xa9""l""\xa9""rateur Gaussien & Neuronal"
720723

724+
#define RSC_TECHNOLOGIES_HDCP_CODE_FR \
725+
"Protection contenu haute d""\xa9""finition"
726+
727+
#define RSC_TECHNOLOGIES_IPU_CODE_FR "Unit""\xa9"" de traitement d'images"
728+
#define RSC_TECHNOLOGIES_VPU_CODE_FR "Unit""\xa9"" de traitement visuel"
729+
721730
#define RSC_TECH_AMD_CPB_COMM_CODE_FR RSC_TECH_AMD_CPB_COMM_CODE_EN
722731
#define RSC_TECH_INTEL_EEO_COMM_CODE_FR RSC_TECH_INTEL_EEO_COMM_CODE_EN
723732
#define RSC_TECH_INTEL_R2H_COMM_CODE_FR RSC_TECH_INTEL_R2H_COMM_CODE_EN

‎x86_64/corefreq-cli-rsc.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1151,7 +1151,11 @@ RESOURCE_ST Resource[] = {
11511151
LDQ(RSC_TECH_HYPERV_KBOX),
11521152
LDQ(RSC_TECH_HYPERV_VMWARE),
11531153
LDQ(RSC_TECH_HYPERV_HYPERV),
1154+
LDT(RSC_TECHNOLOGIES_VMD),
11541155
LDT(RSC_TECHNOLOGIES_GNA),
1156+
LDT(RSC_TECHNOLOGIES_HDCP),
1157+
LDT(RSC_TECHNOLOGIES_IPU),
1158+
LDT(RSC_TECHNOLOGIES_VPU),
11551159
LDT(RSC_PERF_MON_TITLE),
11561160
LDT(RSC_PERF_CAPS_TITLE),
11571161
LDT(RSC_VERSION),

‎x86_64/corefreq-cli-rsc.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -954,7 +954,11 @@ enum {
954954
RSC_TECH_HYPERV_KBOX,
955955
RSC_TECH_HYPERV_VMWARE,
956956
RSC_TECH_HYPERV_HYPERV,
957+
RSC_TECHNOLOGIES_VMD,
957958
RSC_TECHNOLOGIES_GNA,
959+
RSC_TECHNOLOGIES_HDCP,
960+
RSC_TECHNOLOGIES_IPU,
961+
RSC_TECHNOLOGIES_VPU,
958962
RSC_PERF_MON_TITLE,
959963
RSC_PERF_CAPS_TITLE,
960964
RSC_VERSION,

‎x86_64/corefreq-cli.c

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4390,6 +4390,16 @@ REASON_CODE SysInfoTech(Window *win,
43904390
SCANKEY_NULL,
43914391
NULL
43924392
},
4393+
{
4394+
(unsigned int[]) { CRC_INTEL, 0 },
4395+
RO(Shm)->Proc.Technology.VMD == 1,
4396+
2, "%s%.*sVMD [%3s]",
4397+
RSC(TECHNOLOGIES_VMD).CODE(), NULL,
4398+
width - 14 - RSZ(TECHNOLOGIES_VMD),
4399+
NULL,
4400+
SCANKEY_NULL,
4401+
NULL
4402+
},
43934403
{
43944404
(unsigned int[]) { CRC_INTEL, 0 },
43954405
RO(Shm)->Proc.Technology.GNA == 1,
@@ -4399,6 +4409,36 @@ REASON_CODE SysInfoTech(Window *win,
43994409
NULL,
44004410
SCANKEY_NULL,
44014411
NULL
4412+
},
4413+
{
4414+
(unsigned int[]) { CRC_INTEL, 0 },
4415+
RO(Shm)->Proc.Technology.HDCP == 1,
4416+
2, "%s%.*sHDCP [%3s]",
4417+
RSC(TECHNOLOGIES_HDCP).CODE(), NULL,
4418+
width - 15 - RSZ(TECHNOLOGIES_HDCP),
4419+
NULL,
4420+
SCANKEY_NULL,
4421+
NULL
4422+
},
4423+
{
4424+
(unsigned int[]) { CRC_INTEL, 0 },
4425+
RO(Shm)->Proc.Technology.IPU == 1,
4426+
2, "%s%.*sIPU [%3s]",
4427+
RSC(TECHNOLOGIES_IPU).CODE(), NULL,
4428+
width - 14 - RSZ(TECHNOLOGIES_IPU),
4429+
NULL,
4430+
SCANKEY_NULL,
4431+
NULL
4432+
},
4433+
{
4434+
(unsigned int[]) { CRC_INTEL, 0 },
4435+
RO(Shm)->Proc.Technology.VPU == 1,
4436+
2, "%s%.*sVPU [%3s]",
4437+
RSC(TECHNOLOGIES_VPU).CODE(), NULL,
4438+
width - 14 - RSZ(TECHNOLOGIES_VPU),
4439+
NULL,
4440+
SCANKEY_NULL,
4441+
NULL
44024442
}
44034443
};
44044444
size_t idx;

‎x86_64/corefreq.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -370,8 +370,12 @@ typedef struct
370370
L2_Stream_HW_Pf : 41-40,
371371
L2_UpDown_Pf : 42-41,
372372
LLC_Streamer : 43-42,
373-
GNA : 44-43,
374-
_pad64 : 64-44;
373+
VMD : 44-43,
374+
GNA : 45-44,
375+
HDCP : 46-45,
376+
IPU : 47-46,
377+
VPU : 48-47,
378+
_pad64 : 64-48;
375379
} Technology;
376380

377381
struct {

‎x86_64/corefreqd.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4972,6 +4972,7 @@ void SKL_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
49724972
RO(Proc)->Uncore.Bus.IOMMU_Ver.Minor;
49734973

49744974
RO(Shm)->Proc.Technology.GNA = !RO(Proc)->Uncore.Bus.SKL_Cap_B.GMM_DIS;
4975+
RO(Shm)->Proc.Technology.IPU = !RO(Proc)->Uncore.Bus.SKL_Cap_B.IMGU_DIS;
49754976
}
49764977

49774978
void RKL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
@@ -5289,7 +5290,10 @@ void RKL_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
52895290
RO(Shm)->Proc.Technology.IOMMU_Ver_Minor = \
52905291
RO(Proc)->Uncore.Bus.IOMMU_Ver.Minor;
52915292

5293+
RO(Shm)->Proc.Technology.VMD = !RO(Proc)->Uncore.Bus.RKL_Cap_B.VMD_DIS;
52925294
RO(Shm)->Proc.Technology.GNA = !RO(Proc)->Uncore.Bus.RKL_Cap_B.GNA_DIS;
5295+
RO(Shm)->Proc.Technology.HDCP= !RO(Proc)->Uncore.Bus.RKL_Cap_B.HDCPD;
5296+
RO(Shm)->Proc.Technology.IPU = !RO(Proc)->Uncore.Bus.RKL_Cap_B.IPU_DIS;
52935297
}
52945298

52955299
void TGL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
@@ -5843,7 +5847,10 @@ void ADL_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
58435847
RO(Shm)->Proc.Technology.IOMMU_Ver_Minor = \
58445848
RO(Proc)->Uncore.Bus.IOMMU_Ver.Minor;
58455849

5850+
RO(Shm)->Proc.Technology.VMD = !RO(Proc)->Uncore.Bus.ADL_Cap_B.VMD_DIS;
58465851
RO(Shm)->Proc.Technology.GNA = !RO(Proc)->Uncore.Bus.ADL_Cap_B.GNA_DIS;
5852+
RO(Shm)->Proc.Technology.HDCP= !RO(Proc)->Uncore.Bus.ADL_Cap_B.HDCPD;
5853+
RO(Shm)->Proc.Technology.IPU = !RO(Proc)->Uncore.Bus.ADL_Cap_B.IPU_DIS;
58475854
}
58485855

58495856
void GLK_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
@@ -5866,6 +5873,7 @@ void GLK_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
58665873
RO(Proc)->Uncore.Bus.IOMMU_Ver.Minor;
58675874

58685875
RO(Shm)->Proc.Technology.GNA = !RO(Proc)->Uncore.Bus.GLK_Cap_B.GMM_DIS;
5876+
RO(Shm)->Proc.Technology.IPU = !RO(Proc)->Uncore.Bus.GLK_Cap_B.IMGU_DIS;
58695877
}
58705878

58715879
void GLK_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))
@@ -5991,7 +5999,11 @@ void MTL_CAP(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc), RO(CORE) *RO(Core))
59915999
RO(Shm)->Proc.Technology.IOMMU_Ver_Minor = \
59926000
RO(Proc)->Uncore.Bus.IOMMU_Ver.Minor;
59936001

6002+
RO(Shm)->Proc.Technology.VMD = !RO(Proc)->Uncore.Bus.MTL_Cap_B.VMD_DIS;
59946003
RO(Shm)->Proc.Technology.GNA = !RO(Proc)->Uncore.Bus.MTL_Cap_B.GNA_DIS;
6004+
RO(Shm)->Proc.Technology.HDCP= !RO(Proc)->Uncore.Bus.MTL_Cap_B.HDCPD;
6005+
RO(Shm)->Proc.Technology.IPU = !RO(Proc)->Uncore.Bus.MTL_Cap_B.IPU_DIS;
6006+
RO(Shm)->Proc.Technology.VPU = !RO(Proc)->Uncore.Bus.MTL_Cap_C.VPU_DIS;
59956007
}
59966008

59976009
void MTL_IMC(RO(SHM_STRUCT) *RO(Shm), RO(PROC) *RO(Proc))

‎x86_64/intel_reg.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5079,7 +5079,7 @@ typedef union
50795079
SMTCAP : 29-28,
50805080
OC_ENABLED : 30-29, /* 0: Overclocking is disabled */
50815081
TRACE_HUB_DIS : 31-30, /* Trace Hub & I/O are disabled */
5082-
IMGU_DIS : 32-31; /* Device 5 associated memory spaces */
5082+
IPU_DIS : 32-31; /* Device 5 associated memory spaces */
50835083
}; /* RKL: Chap. 3.1.39 ; TGL: $3.1.41 */
50845084
} RKL_CAPID_B;
50855085

@@ -5112,7 +5112,7 @@ typedef union
51125112
SMTCAP : 29-28,
51135113
OC_ENABLED : 30-29,
51145114
TRACE_HUB_DIS : 31-30,
5115-
IMGU_DIS : 32-31;
5115+
IPU_DIS : 32-31;
51165116
};
51175117
} ADL_CAPID_B;
51185118

@@ -5145,7 +5145,7 @@ typedef union
51455145
SMTCAP : 29-28,
51465146
OC_ENABLED : 30-29,
51475147
TRACE_HUB_DIS : 31-30,
5148-
IMGU_DIS : 32-31; /* Image Processing Unit Disable */
5148+
IPU_DIS : 32-31; /* Image Processing Unit Disable */
51495149
};
51505150
} MTL_CAPID_B;
51515151

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