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[dart2wasm] Expose missing Wasm SIMD intrinsics (bitmask, signed comparisons, shuffle, shifts) in dart:_wasm #63680
In #63521 and https://dart-review.googlesource.com/c/sdk/+/507760, we lowered core arithmetic and basic comparison operations on Float32x4, Int32x4, and Float64x2 in simd.dart to hardware WebAssembly vector primitives (WasmF32x4, WasmI32x4, WasmF64x2). This produced a 3.19x speedup on real-world vector kernels.
However, several standard operations in dart:typed_data still fall back to scalar lane extraction loops or temporary heap memory buffering because the underlying WebAssembly v128 instructions are not yet exposed in dart:_wasm (wasm_types.dart) or the dart2wasm backend.
Missing Intrinsics & Optimization Opportunities
1. Vector Sign Bitmask Extraction (i32x4.bitmask)
Missing Wasm Instruction: i32x4.bitmask
Current Fallback: Int32x4.signMask and Float32x4.signMask currently extract sign bits by pulling 4 separate integer lanes (extractLane(i)) and bit-shifting them into a 4-bit scalar mask.
Proposed Solution: Expose bitmask on WasmI32x4 in wasm_types.dart.
Impact: Collapses signMask evaluation from multi-instruction lane extractions down to 1 single CPU hardware instruction.
2. Signed Integer Vector Comparisons (i32x4.lt_s, gt_s, le_s, ge_s)
Current Fallback: Int32x4.greaterThan(), lessThan(), greaterThanOrEqual(), and lessThanOrEqual() currently execute via scalar lane extraction and comparison loops because WasmI32x4 only implements equality (eq).
Proposed Solution: Add signed integer comparison intrinsics to WasmI32x4 in wasm_types.dart and map them in compiler code generators (pkg/dart2wasm/).
Impact: Allows integer SIMD comparison logic to execute 100% in vector registers without scalar unpacking.
3. Hardware Vector Lane Shuffle (i8x16.shuffle)
Missing Wasm Instruction: i8x16.shuffle (for general vector swizzling)
Current Fallback: Float32x4.shuffle(), Float32x4.shuffleMix(), Int32x4.shuffle(), and Int32x4.shuffleMix() currently use temporary Int32List memory buffers and array indexing (_list[mask & 0x3]).
Proposed Solution: Expose i8x16.shuffle in WasmI32x4 and WasmF32x4.
Impact: Eliminates all heap memory buffer roundtrips during vector lane permutations.
@modulovalue you're assigned! ZERO pressure to finish this. Just putting a stake in the ground. Let us know if you DON'T want to actively track these so we can remove the assignment. 🙏
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modulovalue commentedon Jul 20, 2026
@kevmoo FYI all of these are on my radar. I'll add the intrinsics once we land the types and are able to start intrinsifying them.
kevmoo commentedon Jul 20, 2026
@modulovalue you're assigned! ZERO pressure to finish this. Just putting a stake in the ground. Let us know if you DON'T want to actively track these so we can remove the assignment. 🙏