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Rx fifo latency fix#4328

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devyte merged 17 commits intoesp8266:masteresp8266/Arduino:masterfrom

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Mar 8, 2018

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Commits on Jan 25, 2018

• Add a new resetmethod_menu_all macro to give the choice of all the reset options. Then only offer all these options for the generic modules.

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Commits on Jan 26, 2018

• Change reset menu from all to extra. This gets rid of duplicated code

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Commits on Feb 8, 2018

• Merge with upstream

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• Fix boards.txt

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• Flush the rx fifo when checking available bytes in fifo. This gives a more correct result rather than waiting until either the fifo is full or until a serial rx timeout occurs.

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• Merge branch 'master' into rx-fifo-latency-fix

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• Merge branch 'master' of https://github.com/esp8266/Arduino

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• Merge branch 'master' of https://github.com/mribble/Arduino-1 into rx-fifo-latency-fix

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• Merge branch 'rx-fifo-latency-fix' of https://github.com/mribble/Arduino-1 into rx-fifo-latency-fix

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• When rx_avaiable is checked return rx_buffer plus rx_fifo. Then during rx_read and rx_peek functions copy over the data in the fifo as needed.

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Commits on Feb 9, 2018

• Clean up early out case.

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Commits on Feb 14, 2018

• Merge branch 'master' into rx-fifo-latency-fix

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• Merge branch 'master' of https://github.com/esp8266/Arduino into rx-fifo-latency-fix

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• Merge branch 'rx-fifo-latency-fix' of https://github.com/mribble/Arduino-1 into rx-fifo-latency-fix

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• Merge branch 'master' of https://github.com/esp8266/Arduino into rx-fifo-latency-fix

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• Set the rx full fifo ISR to trigger a little sooner. This makes the uart rx isr more robust in cases where the ISR can't trigger very fast

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Commits on Mar 8, 2018

• Merge branch 'master' into rx-fifo-latency-fix

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