Skip to content

fix(esp_lvgl_port): Place LVGL task stack to internal RAM #601

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: master
Choose a base branch
from

Conversation

tore-espressif
Copy link
Collaborator

ESP-BSP Pull Request checklist

Note: For new BSPs create a PR with this link.

  • Version of modified component bumped
  • CI passing

Change description

By default, place LVGL task stack in internal RAM to avoid issues with cache if SPIRAM is used.

If placed in external RAM, following error can raise:

assert failed: spi_flash_disable_interrupts_caches_and_other_cpu cache_utils.c:127 (esp_task_stack_is_sane_cache_disabled())

@tore-espressif tore-espressif requested a review from espzav July 8, 2025 07:40
@tore-espressif tore-espressif self-assigned this Jul 8, 2025
Copy link

github-actions bot commented Jul 8, 2025

Test Results

 5 files   5 suites   1m 39s ⏱️
26 tests 26 ✅ 0 💤 0 ❌
27 runs  27 ✅ 0 💤 0 ❌

Results for commit 49a4af4.

♻️ This comment has been updated with latest results.

@espzav
Copy link
Collaborator

espzav commented Jul 8, 2025

On esp_wrover_kit:
assert failed: xTaskCreateStaticPinnedToCore freertos_tasks_c_additions.h:299 (xPortcheckValidStackMem(puxStackBuffer))

Backtrace: 0x40086fcd:0x3ffb55a0 0x40086f95:0x3ffb55c0 0x4008e9f1:0x3ffb55e0 0x4008ac23:0x3ffb5700 0x40125dfd:0x3ffb5750
0x400d70ee:0x3ffb5790 0x400d6df8:0x3ffb57c0 0x400d6e3d:0x3ffb57e0 0x400d6837:0x3ffb5830 0x40125d14:0x3ffb5850 0x40087c8
1:0x3ffb5880
--- 0x40086fcd: panic_abort at C:/WORK/GIT/esp-idf_GitLab/components/esp_system/panic.c:469
--- 0x40086f95: esp_system_abort at C:/WORK/GIT/esp-idf_GitLab/components/esp_system/port/esp_system_chip.c:87
--- 0x4008e9f1: __assert_func at C:/WORK/GIT/esp-idf_GitLab/components/newlib/src/assert.c:80
--- 0x4008ac23: xTaskCreateStaticPinnedToCore at C:/WORK/GIT/esp-idf_GitLab/components/freertos/esp_additions/freertos_t
asks_c_additions.h:299
--- 0x40125dfd: xTaskCreatePinnedToCoreWithCaps at C:/WORK/GIT/esp-idf_GitLab/components/freertos/esp_additions/idf_addi
tions.c:58
--- 0x400d70ee: xTaskCreateWithCaps at C:/WORK/GIT/esp-idf_GitLab/components/freertos/esp_additions/include/freertos/idf
_additions.h:331
--- (inlined by) lvgl_port_init at C:/WORK/GIT/esp-bsp/components/esp_lvgl_port/src/lvgl9/esp_lvgl_port.c:90
--- 0x400d6df8: bsp_display_start_with_config at C:/WORK/GIT/esp-bsp/bsp/esp_wrover_kit/esp_wrover_kit.c:464
--- 0x400d6e3d: bsp_display_start at C:/WORK/GIT/esp-bsp/bsp/esp_wrover_kit/esp_wrover_kit.c:457
--- 0x400d6837: app_main at C:/WORK/GIT/esp-bsp/examples/display/main/main.c:23
--- 0x40125d14: main_task at C:/WORK/GIT/esp-idf_GitLab/components/freertos/app_startup.c:208
--- 0x40087c81: vPortTaskWrapper at C:/WORK/GIT/esp-idf_GitLab/components/freertos/FreeRTOS-Kernel/portable/xtensa/port.
c:139

By default, place LVGL task stack in internal RAM to avoid issues with
cache if SPIRAM is used.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

2 participants