Fixing a bunch of nightly fallouts

.travis.yml

@@ -8,6 +8,8 @@ install:
     - tar xf rust.tgz
     - (cd ./rust-nightly-x86_64-unknown-linux-gnu/; sudo ./install.sh)
     - export LD_LIBRARY_PATH=/usr/local/lib
+    - (mkdir -p ./thirdparty; cd ./thirdparty; git clone --depth 50 https://github.com/rust-lang/rust)
+    - "(cd ./thirdparty/rust; git checkout `rustc --version|awk '{sub(/\\(/, \"\", $3); print $3}'`)"
 before_script:
     - rustc --version
 script:

Rakefile

@@ -75,6 +75,7 @@ compile_rust :platformtree_crate, {
   produce:   'platformtree/platformtree.rs'.in_root.as_rlib.in_build,
   out_dir:   true,
   build_for: :host,
+  optimize: 0,
 }
 
 rust_tests :platformtree_test, {
@@ -98,6 +99,7 @@ compile_rust :macro_platformtree, {
   produce:   'macro/platformtree.rs'.in_root.as_dylib.in_build,
   out_dir:   true,
   build_for: :host,
+  optimize: 0,
 }
 
 desc "Build API documentation"

src/hal/k20/uart.rs

@@ -78,7 +78,7 @@ enum ParitySelect {
 }
 
 impl UARTPeripheral {
-  fn reg(self) -> &reg::UART {
+  fn reg(self) -> &'static reg::UART {
     match self {
       UART0 => &reg::UART0,
       UART1 => &reg::UART1,

src/hal/lpc17xx/peripheral_clock.rs

@@ -195,7 +195,7 @@ impl PeripheralClock {
     }
   }
 
-  fn divisor_reg_and_offset(self) -> (&reg::PCLKSEL, u32) {
+  fn divisor_reg_and_offset(self) -> (&'static reg::PCLKSEL, u32) {
     match self.to_divisor() {
       WDTDivisor|TIMER0Divisor|TIMER1Divisor|UART0Divisor|UART1Divisor|
       PWM1Divisor|I2C0Divisor|SPIDivisor|SSP1Divisor|DACDivisor|ADCDivisor|

src/hal/lpc17xx/uart.rs

@@ -113,7 +113,7 @@ pub struct UART {
 }
 
 impl UARTPeripheral {
-  fn reg(self) -> &reg::UART {
+  fn reg(self) -> &'static reg::UART {
     match self {
       UART0 => &reg::UART0,
       UART2 => &reg::UART2,

support/build/rlib.rb

@@ -17,6 +17,6 @@
 
 module Rlib
   def self.crate_name(src)
-    `#{RUSTC} --print-file-name "#{src}"`
+    `#{RUSTC} --print-file-name "#{src}"`.strip
   end
 end