[vISA]: Fix the WAW/WAR issue of ACC caused by mul/mulh/madw in local scheduling. #2 try.

on some platforms, mul/mulh/madw will be expanded into mul+mach/macl after local scheduling.
Since ACC is used as dst of expanded mul, it is a must to set implicit ACC as dst
of mul/mulh/madw. Otherwise, there will be WAW/WAR issue of ACC in local scheduling.

Author: fangliu2020

visa/HWConformity.cpp

@@ -2122,6 +2122,11 @@ void HWConformity::doGenerateMacl(INST_LIST_ITER it, G4_BB* bb)
             G4_DstRegRegion* tmpDst = insertMovAfter(it, origDst, tmpType, bb, GRFALIGN);
             mulInst->setDest(tmpDst);
         }
+
+        // set implicit acc dst to the mul instruction as acc will be used as dst of the expanded mul after local scheduling.
+        // it is a must to fix the WAR/WAW issue of acc in local scheduling.
+        G4_DstRegRegion* accDstOpnd = builder.createDst(builder.phyregpool.getAcc0Reg(), 0, 0, 1, mulInst->getDst()->getType());
+        mulInst->setImplAccDst(accDstOpnd);
     }
     else
     {
@@ -2679,6 +2684,11 @@ void HWConformity::fixMULHInst(INST_LIST_ITER& i, G4_BB* bb)
         // this effectivly means sat is broken for mul D D D
         inst->setSaturate(g4::NOSAT);
 
+        // set implicit acc dst to the mulh instruction as acc will be used as dst of the expanded mul after local scheduling.
+        // it is a must to fix the WAR/WAW issue of acc in local scheduling.
+        G4_DstRegRegion* accDstOpnd = builder.createDst(builder.phyregpool.getAcc0Reg(), 0, 0, 1, inst->getDst()->getType());
+        inst->setImplAccDst(accDstOpnd);
+
         if (execSize > builder.getNativeExecSize())
         {
             auto start_iter = i;
@@ -8026,6 +8036,11 @@ INST_LIST_ITER HWConformity::fixMadwInst(INST_LIST_ITER it, G4_BB* bb)
             }
         }
 
+        // add implicit acc dst to the madw instruction as acc will be used as dst of the expanded mul after local scheduling.
+        // it is a must to fix the WAR/WAW issue of acc in local scheduling.
+        G4_DstRegRegion* accDstOpnd = builder.createDst(builder.phyregpool.getAcc0Reg(), 0, 0, 1, madwInst->getDst()->getType());
+        madwInst->setImplAccDst(accDstOpnd);
+
         retIter = std::next(it);
     }
     else