[SYCL][FPGA] Fix the way we handle duplicate vs conflicting values with loop attributes #14342
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…LIntelRegister, SYCLIntelMemory) This patch uses MutualExclusions tablegen support to allow us to remove a custom diagnostic checking codes with FPGA attributes: [[intel:fpga_register]] and [[intel::fpga_memory]]. No test is added as we alreday have an existing LIT test (SemaSYCL/local.cpp) that shows the behavior.
…es with loop attributes
This patch improves diagnostic supports by resolving bugs the way we handle duplicate vs conflicting values with the following SYCL FPGA loop attributes:
[[intel::max_reinvocation_delay()]]
[[intel::initiation_interval()]]
[[intel::max_concurrency()]]
[[intel::speculated_iterations()]]
[[intel::max_interleaving()]]
The patch addresses issues in the test case below, which previously missed diagnostics due to a discontinuation in the while loop while checking for duplicate versus conflicting attribute values in the routine CheckForDuplicateAttrs().
Example with `speculated_iterations` attribute:
Before the fix:
[[intel::speculated_iterations(1)]] // expected-note {{previous attribute is here}}
[[intel::speculated_iterations(1)]] // OK
[[intel::speculated_iterations(2)]] // expected-error {{conflicting loop attribute 'speculated_iterations'}}
[[intel::speculated_iterations(4)]] // OK
for (int i = 0; i != 10; ++i) { a[i] = 0; }
After the fix:
[[intel::speculated_iterations(1)]] // expected-note 2 {{previous attribute is here}}
[[intel::speculated_iterations(1)]] // OK
[[intel::speculated_iterations(2)]] // expected-error {{conflicting loop attribute 'speculated_iterations'}}
[[intel::speculated_iterations(4)]] // expected-error {{conflicting loop attribute 'speculated_iterations'}}
for (int i = 0; i != 10; ++i) { a[i] = 0; }
Signed-off-by: Soumi Manna <[email protected]>
smanna12
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premanandrao
approved these changes
Jun 28, 2024
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Thank you @premanandrao for reviews! |
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@intel/llvm-gatekeepers, this PR is ready to merge. Thank you |
bader
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This patch improves diagnostic supports by resolving bugs the way we handle duplicate vs conflicting values with the following SYCL FPGA loop attributes:
The patch addresses issues in the test case below, which previously missed diagnostics due to a discontinuation in the while loop while checking for duplicate versus conflicting attribute values in the routine CheckForDuplicateAttrs().
Example with `speculated_iterations' attribute:
Signed-off-by: Soumi Manna [email protected]