LEA instruction generated with Z80 setting

[Serentty]

I compiled this code with -O3:

size_t strlen(const char* str)
{
	size_t i;
	for(i = 0; *str; str++);
	return i;
}

The compiler generated this assembly, which uses the LEA instruction, which as far as I can tell is an eZ80 instruction not present on the original Z80.

	SEGMENT	CODE
	.file	"test.cpp"
	XDEF	__Z6strlenPKc
__Z6strlenPKc:
	push	ix
	ld	ix, 0
	add	ix, sp
	push	hl
	push	hl
	push	hl
	ld	l, (ix + 4)
	ld	h, (ix + 5)
	ex	(sp), hl
	pop	iy
	ld	e, 0
	ld	hl, 0
	ld	c, 1
	ld	d, 0
BB0_1:
	ld	a, (iy)
	cp	a, e
	ld	a, c
	jp	nz, BB0_2
	inc iy
	bit	0, a
	jp	z, BB0_1
	jp	BB0_4
BB0_2:
	ld	a, d
	inc iy
	bit	0, a
	jp	z, BB0_1
BB0_4:
	ld	sp, ix
	pop	ix
	ret

[adriweb]

Looks like you copy/pasted the wrong thing, but the lea is indeed there:

clang -target z80 -w -S -O3 -xc - -o - <<<"int strlen(const char* str) { int i; for(i = 0; *str; str++); return i; }"

	SEGMENT	CODE
	.file	"-"
	XDEF	_strlen
_strlen:
	push	ix
	ld	ix, 0
	add	ix, sp
	push	hl
	push	hl
	push	hl
	ld	l, (ix + 4)
	ld	h, (ix + 5)
	ex	(sp), hl
	pop	iy
	ld	e, 0
	ld	hl, 0
	ld	c, 1
	ld	d, 0
BB0_1:
	ld	a, (iy)
	cp	a, e
	ld	a, c
	jp	nz, BB0_2
	lea	iy, iy + 1
	bit	0, a
	jp	z, BB0_1
	jp	BB0_4
BB0_2:
	ld	a, d
	lea	iy, iy + 1
	bit	0, a
	jp	z, BB0_1
BB0_4:
	ld	sp, ix
	pop	ix
	ret

[Serentty]

So is this an actual issue or am I just screwing up here?

[jacobly0]

The instruction selector uses LEA on Z80 temporarily to represent frame index addresses which are replaced later, but it incorrectly did the same thing for GEP on Z80. This has been fixed.

[Serentty]

Great, thanks!

[Serentty]

Okay, so sorry to be annoying, but I don't see any new commits. Were you planning to push this later with a bunch of other changes, or am I looking on the wrong branch?

[adriweb]

All the commits keep getting rewritten and rebased on top of the (up-to-date) upstream LLVM ones. You can do `git pull --rebase` for instance to get them.

[Serentty]

Ah, I was just looking at what GitHub showed as the most recent commit. Thanks.