add KMOW (#561)

* add KMOW

* add KMOVW

* bug fix

* bug fix

Co-authored-by: yangjiaxin <[email protected]>

Author: yjxxin

generated/Arch/X86/SaveState.S

@@ -235,3 +235,14 @@ movdqu [RIP + STATE_PTR + 1872], XMM29
 movdqu [RIP + STATE_PTR + 1936], XMM30
 movdqu [RIP + STATE_PTR + 2000], XMM31
 #endif  // HAS_FEATURE_AVX512
+#if HAS_FEATURE_AVX512
+kmovq [RIP + STATE_PTR + 3512], K0
+kmovq [RIP + STATE_PTR + 3528], K1
+kmovq [RIP + STATE_PTR + 3544], K2
+kmovq [RIP + STATE_PTR + 3560], K3
+kmovq [RIP + STATE_PTR + 3576], K4
+kmovq [RIP + STATE_PTR + 3592], K5
+kmovq [RIP + STATE_PTR + 3608], K6
+kmovq [RIP + STATE_PTR + 3624], K7
+
+#endif  // HAS_FEATURE_AVX512

include/remill/Arch/X86/Runtime/State.h

@@ -754,6 +754,13 @@ struct alignas(8) MMX final {
   } __attribute__((packed)) elems[8];
 };
 
+struct alignas(8) K_REG final {
+  struct alignas(8) {
+    uint64_t _0;
+    uint64_t val;
+  } __attribute__((packed)) elems[8];
+};
+
 static_assert(128 == sizeof(MMX), "Invalid structure packing of `MMX`.");
 
 enum : size_t { kNumVecRegisters = 32 };
@@ -779,9 +786,10 @@ struct alignas(16) X86State : public ArchState {
   XCR0 xcr0;  // 8 bytes.
   FPU x87;  // 512 bytes
   SegmentCaches seg_caches;  // 96 bytes
+  K_REG k_reg; // 128 bytes.
 } __attribute__((packed));
 
-static_assert((96 + 3264 + 16) == sizeof(X86State),
+static_assert((96 + 3264 + 16 + 128) == sizeof(X86State),
               "Invalid packing of `struct State`");
 
 struct State : public X86State {};

lib/Arch/X86/Arch.cpp

@@ -1688,6 +1688,17 @@ void X86Arch::PopulateRegisterTable(void) const {
   REG(MM6, mmx.elems[6].val.qwords.elems[0], u64);
   REG(MM7, mmx.elems[7].val.qwords.elems[0], u64);
 
+  if (has_avx512) {
+    REG(K0, k_reg.elems[0].val, u64);
+    REG(K1, k_reg.elems[1].val, u64);
+    REG(K2, k_reg.elems[2].val, u64);
+    REG(K3, k_reg.elems[3].val, u64);
+    REG(K4, k_reg.elems[4].val, u64);
+    REG(K5, k_reg.elems[5].val, u64);
+    REG(K6, k_reg.elems[6].val, u64);
+    REG(K7, k_reg.elems[7].val, u64);
+  }
+
   // Arithmetic flags. Data-flow analyses will clear these out ;-)
   REG(AF, aflag.af, u8);
   REG(CF, aflag.cf, u8);

lib/Arch/X86/Semantics/DATAXFER.cpp

@@ -1121,3 +1121,19 @@ IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMd_64) = MOVSX<R64W, M32, int64_t>;)
 IF_64BIT(DEF_ISEL(MOVSXD_GPRv_MEMz_64) = MOVSX<R64W, M32, int64_t>;)
 IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPR32_64) = MOVSX<R64W, R32, int64_t>;)
 IF_64BIT(DEF_ISEL(MOVSXD_GPRv_GPRz_64) = MOVSX<R64W, R32, int64_t>;)
+
+namespace {
+template <typename S1, typename S2>
+DEF_SEM(KMOVW, S1 dst, S2 src) {
+  auto value = UInt16(Read(src));
+  WriteZExt(dst, value);
+  return memory;
+}
+
+}  // namespace
+
+DEF_ISEL(KMOVW_MASKmskw_MASKu16_AVX512) = KMOVW<R64W, R64>;
+DEF_ISEL(KMOVW_GPR32u32_MASKmskw_AVX512) = KMOVW<R32W, R64>;
+DEF_ISEL(KMOVW_MASKmskw_GPR32u32_AVX512) = KMOVW<R64W, R32>;
+DEF_ISEL(KMOVW_MASKmskw_MEMu16_AVX512) = KMOVW<R64W, M16>;
+DEF_ISEL(KMOVW_MEMu16_MASKmskw_AVX512) = KMOVW<M16W, R64>;

lib/BC/DeadStoreEliminator.cpp

@@ -65,7 +65,7 @@ DEFINE_bool(name_register_variables, false,
 namespace remill {
 namespace {
 
-static constexpr size_t kMaxNumSlots = 256;
+static constexpr size_t kMaxNumSlots = 272;
 
 using ValueToOffset = std::unordered_map<llvm::Value *, uint64_t>;
 using InstToOffset = std::unordered_map<llvm::Instruction *, uint64_t>;

tests/X86/DATAXFER/KMOVW.S

@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2021 Trail of Bits, Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if HAS_FEATURE_AVX512
+TEST_BEGIN_64(KMOVW_MASKmskw_GPR32u32_AVX512, 1)
+TEST_INPUTS(
+    0,
+    1,
+    0x41,
+    0xff,
+    0x80)
+
+    kmovw k2, ARG1_32
+TEST_END_64
+
+
+TEST_BEGIN_64(KMOVW_MASKmskw_MASKu16_AVX512, 1)
+TEST_INPUTS(
+    0,
+    1,
+    0x41,
+    0xff,
+    0x80)
+
+    kmovw k2, ARG1_32
+    kmovw k2, k1
+TEST_END_64
+
+TEST_BEGIN_64(KMOVW_GPR32u32_MASKmskw_AVX512, 1)
+TEST_INPUTS(
+    0,
+    1,
+    0x41,
+    0xff,
+    0x80)
+
+    kmovw k2, ARG1_32
+    kmovw RET_32, k2
+TEST_END_64
+
+#endif  // HAS_FEATURE_AVX512s

tests/X86/Tests.S

@@ -328,6 +328,7 @@ SYMBOL(__x86_test_table_begin):
 #include "tests/X86/ABI.S"
 #include "tests/X86/MMX/INPUTS.S"
 
+
 /* Change to `0` and put new `#include`s above when making new tests to speed
  * up compile and test times. */
 #if 1
@@ -356,6 +357,7 @@ SYMBOL(__x86_test_table_begin):
 #include "tests/X86/DATAXFER/MOVUPS.S"
 #include "tests/X86/DATAXFER/MOVZX.S"
 #include "tests/X86/DATAXFER/XCHG.S"
+#include "tests/X86/DATAXFER/KMOVW.S"
 
 /* Bring in the rest of the semantic tests. */