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[InstSimplify] FP-related miscompile #58046
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I believe this is a bug in CannotBeOrderedLessThanZero. For fdiv, this probably needs to do a SignBitOnly check, because it can turn a negative zero into a negative non-zero. |
Candidate patch: https://reviews.llvm.org/D134876 |
Failed to cherry-pick: aa25c92 https://github.com/llvm/llvm-project/actions/runs/3152450212 Please manually backport the fix and push it to your github fork. Once this is done, please add a comment like this:
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/branch nikic/llvm-project/backport-fdiv-fix |
When checking the RHS of fdiv, we should set the SignBitOnly flag, because a negative zero can become -Inf, which is ordered less than zero. Fixes llvm#58046. Differential Revision: https://reviews.llvm.org/D134876
/pull-request llvm/llvm-project-release-prs#174 |
When checking the RHS of fdiv, we should set the SignBitOnly flag, because a negative zero can become -Inf, which is ordered less than zero. Fixes llvm/llvm-project#58046. Differential Revision: https://reviews.llvm.org/D134876
https://alive2.llvm.org/ce/z/oShzr3 This was noted as a missing fold in D134876 (with additional examples based on issue #58046). I'm assuming that fmul with a zero operand is rare enough that the use of ValueTracking will not noticeably increase compile-time. This adjusts a PowerPC codegen test that was added with D88388 because it would get folded away and no longer provide coverage for the bug fix.
When checking the RHS of fdiv, we should set the SignBitOnly flag, because a negative zero can become -Inf, which is ordered less than zero. Fixes llvm/llvm-project#58046. Differential Revision: https://reviews.llvm.org/D134876
From rust-lang/rust#102402:
Counter-proof: https://alive2.llvm.org/ce/z/6Rx_Cb
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