[HLSL] Overload resolution should promote 16-bit types

[llvm-beanz]

In working on #71098, I've discovered a few cases where C++ overload resolution rules don't quite match HLSL. HLSL allows "promotion" casting 16-bit types to larger types, and will select the first larger type that fits. In the following examples both should resolve successfully to the 32-bit overloads:

void Fn3(double2 D);
void Fn3(float2 F);

void Call3(half2 H) {
  Fn3(H);
}

void Fn4(int64_t2 L);
void Fn4(int2 I);

void Call4(int16_t H) {
  Fn4(H);
}

Notes:

• The half support is currently incorrect
• We do not correctly disable int 16bit types

Acceptance Criteria

• A test case demonstrating the above overload resolution.
• Spec definition around promotion of types is created.
  • Spec update link to be provided in the PR for this item
• A best effort list of differences between LLVM and DXC overloads is represented in tests and in the DXC vs clang document

[llvmbot]

@llvm/issue-subscribers-clang-frontend

Author: Chris B (llvm-beanz)

In working on #71098, I've discovered a few cases where C++ overload resolution rules don't quite match HLSL. HLSL allows "promotion" casting 16-bit types to larger types, and will select the first larger type that fits. In the following examples both should resolve successfully to the 32-bit overloads:

void Fn3(double2 D);
void Fn3(float2 F);

void Call3(half2 H) {
  Fn3(H);
}

void Fn4(int64_t2 L);
void Fn4(int2 I);

void Call4(int16_t H) {
  Fn4(H);
}

Notes:

• The half support is currently incorrect
• We do not correctly disable int 16bit types

Acceptance Criteria

• A test case demonstrating the above overload resolution.
• Spec definition around promotion of types is created.
  • Spec update link to be provided in the PR for this item
• A best effort list of differences between LLVM and DXC overloads is represented in tests and in the DXC vs clang document