ODR warning in ARMGenInstrInfo.inc (ARMInstrTable), Arch64GenAsmMatcher.in (SubtargetFeatureBits), MachineScheduler.h (GenericSchedulerBase)

[thesamesam]

When building with -flto -Werror=odr to find possible runtime issues w/ LTO:

/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: error: type ‘struct ARMInstrTable’ violates the C++ One Definition Rule [-Werror=odr]
 5830 | struct ARMInstrTable {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:73: note: a different type is defined in another translation unit
   73 | struct ARMInstrTable {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5831: note: the first difference of corresponding definitions is field ‘Insts’
 5831 |   MCInstrDesc Insts[4465];
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:74: note: a field of same name but different type is defined in another translation unit
   74 |   MCInstrDesc Insts[4445];
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: note: array types have different bounds
 5830 | struct ARMInstrTable {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:78: error: ‘ARMDescs’ violates the C++ One Definition Rule [-Werror=odr]
   78 | extern const ARMInstrTable ARMDescs;
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: type ‘const struct ARMInstrTable’ itself violates the C++ One Definition Rule
 5848 | extern const ARMInstrTable ARMDescs = {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: ‘ARMDescs’ was previously declared here
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:272: error: type ‘SubtargetFeatureBits’ violates the C++ One Definition Rule [-Werror=odr]
  272 | enum SubtargetFeatureBits : uint8_t {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:49: note: an enum with different value name is defined in another translation unit
   49 | enum SubtargetFeatureBits : uint8_t {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:273: note: name ‘Feature_HasV8_0aBit’ differs from name ‘Feature_HasV5Bit’ defined in another translation unit
  273 |   Feature_HasV8_0aBit = 103,
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:50: note: mismatching definition
   50 |   Feature_HasV5Bit = 2,
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: error: virtual table of type ‘struct GenericSchedulerBase’ violates one definition rule [-Werror=odr]
 1067 | class GenericSchedulerBase : public MachineSchedStrategy {
      | 
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: note: the conflicting type defined in another translation unit
 1067 | class GenericSchedulerBase : public MachineSchedStrategy {
      | 
<built-in>: note: virtual method ‘__cxa_pure_virtual’
/var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:257: note: ought to match virtual method ‘scheduleTree’ but does not
  257 |   virtual void scheduleTree(unsigned SubtreeID) {}
      | 

Originally reported downstream in Gentoo at https://bugs.gentoo.org/926529.

[llvmbot]

@llvm/issue-subscribers-backend-hexagon

Author: Sam James (thesamesam)

When building with `-flto -Werror=odr` to find possible runtime issues w/ LTO: ``` /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: error: type ‘struct ARMInstrTable’ violates the C++ One Definition Rule [-Werror=odr] 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:73: note: a different type is defined in another translation unit 73 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5831: note: the first difference of corresponding definitions is field ‘Insts’ 5831 | MCInstrDesc Insts[4465]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:74: note: a field of same name but different type is defined in another translation unit 74 | MCInstrDesc Insts[4445]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: note: array types have different bounds 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:78: error: ‘ARMDescs’ violates the C++ One Definition Rule [-Werror=odr] 78 | extern const ARMInstrTable ARMDescs; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: type ‘const struct ARMInstrTable’ itself violates the C++ One Definition Rule 5848 | extern const ARMInstrTable ARMDescs = { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: ‘ARMDescs’ was previously declared here /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:272: error: type ‘SubtargetFeatureBits’ violates the C++ One Definition Rule [-Werror=odr] 272 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:49: note: an enum with different value name is defined in another translation unit 49 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:273: note: name ‘Feature_HasV8_0aBit’ differs from name ‘Feature_HasV5Bit’ defined in another translation unit 273 | Feature_HasV8_0aBit = 103, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:50: note: mismatching definition 50 | Feature_HasV5Bit = 2, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: error: virtual table of type ‘struct GenericSchedulerBase’ violates one definition rule [-Werror=odr] 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: note: the conflicting type defined in another translation unit 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | <built-in>: note: virtual method ‘__cxa_pure_virtual’ /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:257: note: ought to match virtual method ‘scheduleTree’ but does not 257 | virtual void scheduleTree(unsigned SubtreeID) {} | ```

Originally reported downstream in Gentoo at https://bugs.gentoo.org/926529.

[llvmbot]

@llvm/issue-subscribers-backend-arm

Author: Sam James (thesamesam)

When building with `-flto -Werror=odr` to find possible runtime issues w/ LTO: ``` /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: error: type ‘struct ARMInstrTable’ violates the C++ One Definition Rule [-Werror=odr] 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:73: note: a different type is defined in another translation unit 73 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5831: note: the first difference of corresponding definitions is field ‘Insts’ 5831 | MCInstrDesc Insts[4465]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:74: note: a field of same name but different type is defined in another translation unit 74 | MCInstrDesc Insts[4445]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: note: array types have different bounds 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:78: error: ‘ARMDescs’ violates the C++ One Definition Rule [-Werror=odr] 78 | extern const ARMInstrTable ARMDescs; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: type ‘const struct ARMInstrTable’ itself violates the C++ One Definition Rule 5848 | extern const ARMInstrTable ARMDescs = { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: ‘ARMDescs’ was previously declared here /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:272: error: type ‘SubtargetFeatureBits’ violates the C++ One Definition Rule [-Werror=odr] 272 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:49: note: an enum with different value name is defined in another translation unit 49 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:273: note: name ‘Feature_HasV8_0aBit’ differs from name ‘Feature_HasV5Bit’ defined in another translation unit 273 | Feature_HasV8_0aBit = 103, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:50: note: mismatching definition 50 | Feature_HasV5Bit = 2, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: error: virtual table of type ‘struct GenericSchedulerBase’ violates one definition rule [-Werror=odr] 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: note: the conflicting type defined in another translation unit 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | <built-in>: note: virtual method ‘__cxa_pure_virtual’ /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:257: note: ought to match virtual method ‘scheduleTree’ but does not 257 | virtual void scheduleTree(unsigned SubtreeID) {} | ```

Originally reported downstream in Gentoo at https://bugs.gentoo.org/926529.

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: Sam James (thesamesam)

When building with `-flto -Werror=odr` to find possible runtime issues w/ LTO: ``` /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: error: type ‘struct ARMInstrTable’ violates the C++ One Definition Rule [-Werror=odr] 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:73: note: a different type is defined in another translation unit 73 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5831: note: the first difference of corresponding definitions is field ‘Insts’ 5831 | MCInstrDesc Insts[4465]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:74: note: a field of same name but different type is defined in another translation unit 74 | MCInstrDesc Insts[4445]; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5830: note: array types have different bounds 5830 | struct ARMInstrTable { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp:78: error: ‘ARMDescs’ violates the C++ One Definition Rule [-Werror=odr] 78 | extern const ARMInstrTable ARMDescs; | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: type ‘const struct ARMInstrTable’ itself violates the C++ One Definition Rule 5848 | extern const ARMInstrTable ARMDescs = { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/ARM/ARMGenInstrInfo.inc:5848: note: ‘ARMDescs’ was previously declared here /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:272: error: type ‘SubtargetFeatureBits’ violates the C++ One Definition Rule [-Werror=odr] 272 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:49: note: an enum with different value name is defined in another translation unit 49 | enum SubtargetFeatureBits : uint8_t { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/AArch64/AArch64GenAsmMatcher.inc:273: note: name ‘Feature_HasV8_0aBit’ differs from name ‘Feature_HasV5Bit’ defined in another translation unit 273 | Feature_HasV8_0aBit = 103, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm_build-abi_x86_32.x86/lib/Target/Hexagon/HexagonGenAsmMatcher.inc:50: note: mismatching definition 50 | Feature_HasV5Bit = 2, | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: error: virtual table of type ‘struct GenericSchedulerBase’ violates one definition rule [-Werror=odr] 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:1067: note: the conflicting type defined in another translation unit 1067 | class GenericSchedulerBase : public MachineSchedStrategy { | <built-in>: note: virtual method ‘__cxa_pure_virtual’ /var/tmp/portage/sys-devel/llvm-18.1.0/work/llvm/include/llvm/CodeGen/MachineScheduler.h:257: note: ought to match virtual method ‘scheduleTree’ but does not 257 | virtual void scheduleTree(unsigned SubtreeID) {} | ```

Originally reported downstream in Gentoo at https://bugs.gentoo.org/926529.

[efriedma-quic]

The ArmDescs mismatch is scary. Seems to come from ffab44b; CC @jayfoad

The SubtargetFeatureBits issue isn't significant; seems like just a missing namespace declaration for an enum that isn't actually visible anywhere else.

I have no idea what the GenericSchedulerBase issue is complaining about.

[jayfoad]

The ArmDescs mismatch is scary. Seems to come from ffab44b; CC @jayfoad

Yeah, sorry, I had forgotten about this. Obviously a quick fix would be to update these numbers to match the tablegenerated header. My preferred long term fix would be to completely remove ARMAsmParser's dependence on ARMInstrTable as discussed with @statham-arm on https://reviews.llvm.org/D142217, but I don't have the ARM-specific knowledge to do that myself.

[AlfieRichardsArm]

This is interesting. This came up in #83436 (comment) where I had to do a messy hack to get around the limitation of ARMOperand not having access to ARMAsmParser.

I think the solution should be to add a reference to ARMAsmParser to ARMOperand so that this sort of thing can be cleaned up. Which is not ideal but probably better than what we have currently.

I am happy to look into this if I have time this week.

[AlfieRichardsArm]

I have proposed a fix for this: #86110