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[AArch64] Implement intrinsics for SME2 FSCALE #100128

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Merged
merged 5 commits into from
Sep 25, 2024
Merged

[AArch64] Implement intrinsics for SME2 FSCALE #100128

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ea280c4
[AArch64] Implement intrinsics for SME2 FSCALE
Lukacma Jul 23, 2024
961a45e
Fix test file
Lukacma Sep 2, 2024
d46912a
Merge branch 'main' into fscale-sme
Lukacma Sep 23, 2024
4d50b42
Merge branch 'main' into fscale-sme
Lukacma Sep 23, 2024
3d9814b
Merge branch 'main' into fscale-sme
Lukacma Sep 24, 2024
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10 changes: 10 additions & 0 deletions clang/include/clang/Basic/arm_sve.td
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Original file line number Diff line number Diff line change
Expand Up @@ -2418,6 +2418,16 @@ let SVETargetGuard = InvalidMode, SMETargetGuard = "sme2" in {
def SVUUNPK_X4 : SInst<"svunpk_{d}[_{3}_x4]", "42.h", "UsUiUl", MergeNone, "aarch64_sve_uunpk_x4", [IsStreaming], []>;
}

//
// Multi-vector scaling
//
let SVETargetGuard = InvalidMode, SMETargetGuard = "sme2,fp8" in {
def FSCALE_SINGLE_X2 : Inst<"svscale[_single_{d}_x2]", "22x", "fhd", MergeNone, "aarch64_sme_fp8_scale_single_x2", [IsStreaming],[]>;
def FSCALE_SINGLE_X4 : Inst<"svscale[_single_{d}_x4]", "44x", "fhd", MergeNone, "aarch64_sme_fp8_scale_single_x4", [IsStreaming],[]>;
def FSCALE_X2 : Inst<"svscale[_{d}_x2]", "222.x", "fhd", MergeNone, "aarch64_sme_fp8_scale_x2", [IsStreaming],[]>;
def FSCALE_X4 : Inst<"svscale[_{d}_x4]", "444.x", "fhd", MergeNone, "aarch64_sme_fp8_scale_x4", [IsStreaming],[]>;
}

let SVETargetGuard = "sve2p1", SMETargetGuard = "sme2" in {
// == BFloat16 multiply-subtract ==
def SVBFMLSLB : SInst<"svbfmlslb[_{d}]", "dd$$", "f", MergeNone, "aarch64_sve_bfmlslb", [IsOverloadNone, VerifyRuntimeMode], []>;
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