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[RISCV] Preserve tail agnostic policy in foldVMV_V_V #105788

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Merged
merged 2 commits into from
Sep 4, 2024
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[RISCV] Preserve tail agnostic policy in foldVMV_V_V #105788

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Precommit tests
lukel97 Aug 23, 2024
d1d74fd
[RISCV] Preserve tail agnostic policy in foldVMV_V_V
lukel97 Aug 23, 2024
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11 changes: 7 additions & 4 deletions llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -529,10 +529,13 @@ bool RISCVVectorPeephole::foldVMV_V_V(MachineInstr &MI) {
*Src->getParent()->getParent()));
}

// Use a conservative tu,mu policy, RISCVInsertVSETVLI will relax it if
// passthru is undef.
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Why is this not stand for cases in the new test?

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It still stands, but the passthru isn't undef in the new test so after RISCVInsertVSETVLI a tu policy gets emitted, even though the original policy was ta

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I found this thread very confusing, so let me comment that I talked to Luke and the original comment never held. We thought it did, but we made a mistake in our reasoning. The missed optimization was simply never visible in practice without the follow up changes.

Src->getOperand(RISCVII::getVecPolicyOpNum(Src->getDesc()))
.setImm(RISCVII::TAIL_UNDISTURBED_MASK_UNDISTURBED);
// If MI was tail agnostic and the VL didn't increase, preserve it.
int64_t Policy = RISCVII::TAIL_UNDISTURBED_MASK_UNDISTURBED;
bool TailAgnostic = (MI.getOperand(5).getImm() & RISCVII::TAIL_AGNOSTIC) ||
Passthru.getReg() == RISCV::NoRegister;
if (TailAgnostic && isVLKnownLE(MI.getOperand(3), SrcVL))
Policy |= RISCVII::TAIL_AGNOSTIC;
Src->getOperand(RISCVII::getVecPolicyOpNum(Src->getDesc())).setImm(Policy);

MRI->replaceRegWith(MI.getOperand(0).getReg(), Src->getOperand(0).getReg());
MI.eraseFromParent();
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42 changes: 42 additions & 0 deletions llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
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Expand Up @@ -18,3 +18,45 @@ body: |
%y:gpr = ADDI $x0, 1
%z:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
---
name: tail_agnostic
body: |
bb.0:
liveins: $v8
; CHECK-LABEL: name: tail_agnostic
; CHECK: liveins: $v8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %passthru:vr = COPY $v8
; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 1 /* ta, mu */
%passthru:vr = COPY $v8
%x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
%y:vr = PseudoVMV_V_V_M1 %passthru, %x, 4, 5 /* e32 */, 1 /* ta, mu */
...
---
name: tail_agnostic_larger_vl
body: |
bb.0:
liveins: $v8
; CHECK-LABEL: name: tail_agnostic_larger_vl
; CHECK: liveins: $v8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %passthru:vr = COPY $v8
; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
%passthru:vr = COPY $v8
%x:vr = PseudoVADD_VV_M1 %passthru, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
%y:vr = PseudoVMV_V_V_M1 %passthru, %x, 5, 5 /* e32 */, 1 /* ta, mu */
...
---
name: undef_passthru_src_undef_passthru
body: |
bb.0:
liveins: $v8
; CHECK-LABEL: name: undef_passthru_src_undef_passthru
; CHECK: liveins: $v8
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: %passthru:vr = COPY $v8
; CHECK-NEXT: %x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 4, 5 /* e32 */, 1 /* ta, mu */
%passthru:vr = COPY $v8
%x:vr = PseudoVADD_VV_M1 $noreg, $noreg, $noreg, 4, 5 /* e32 */, 0 /* tu, mu */
%y:vr = PseudoVMV_V_V_M1 $noreg, %x, 4, 5 /* e32 */, 0 /* tu, mu */
...
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