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[InstCombine] Fold (x == y) ? 0 : (x > y ? 1 : -1) into ucmp/scmp(x,y) #107314

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Merged
merged 6 commits into from
Sep 23, 2024
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[InstCombine] Fold (x == y) ? 0 : (x > y ? 1 : -1) into ucmp/scmp(x,y) #107314

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481e053
Precommit tests
Poseydon42 Sep 4, 2024
839adc7
Implement the fold
Poseydon42 Sep 4, 2024
4f388a4
Update existing tests
Poseydon42 Sep 4, 2024
1a85093
Fix formatting
Poseydon42 Sep 4, 2024
b7ee463
Handle vector types
Poseydon42 Sep 5, 2024
b841fc6
Add test for the inverse case
Poseydon42 Sep 5, 2024
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30 changes: 27 additions & 3 deletions llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3551,9 +3551,7 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
Pred = ICmpInst::getSwappedPredicate(Pred);
std::swap(LHS, RHS);
}

Intrinsic::ID IID =
ICmpInst::isSigned(Pred) ? Intrinsic::scmp : Intrinsic::ucmp;
bool IsSigned = ICmpInst::isSigned(Pred);

bool Replace = false;
ICmpInst::Predicate ExtendedCmpPredicate;
Expand All @@ -3575,6 +3573,32 @@ Instruction *InstCombinerImpl::foldSelectToCmp(SelectInst &SI) {
ICmpInst::getSwappedPredicate(ExtendedCmpPredicate) == Pred))
Replace = true;

// (x == y) ? 0 : (x > y ? 1 : -1)
ICmpInst::Predicate FalseBranchSelectPredicate;
const APInt *InnerTV, *InnerFV;
if (Pred == ICmpInst::ICMP_EQ && match(TV, m_Zero()) &&
match(FV, m_Select(m_c_ICmp(FalseBranchSelectPredicate, m_Specific(LHS),
m_Specific(RHS)),
m_APInt(InnerTV), m_APInt(InnerFV)))) {
if (!ICmpInst::isGT(FalseBranchSelectPredicate)) {
FalseBranchSelectPredicate =
ICmpInst::getSwappedPredicate(FalseBranchSelectPredicate);
std::swap(LHS, RHS);
}

if (!InnerTV->isOne()) {
std::swap(InnerTV, InnerFV);
std::swap(LHS, RHS);
}

if (ICmpInst::isGT(FalseBranchSelectPredicate) && InnerTV->isOne() &&
InnerFV->isAllOnes()) {
IsSigned = ICmpInst::isSigned(FalseBranchSelectPredicate);
Replace = true;
}
}

Intrinsic::ID IID = IsSigned ? Intrinsic::scmp : Intrinsic::ucmp;
if (Replace)
return replaceInstUsesWith(
SI, Builder.CreateIntrinsic(SI.getType(), IID, {LHS, RHS}));
Expand Down
39 changes: 10 additions & 29 deletions llvm/test/Transforms/InstCombine/compare-3way.ll
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Expand Up @@ -15,8 +15,7 @@ define void @test_low_sgt(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp ne i64 [[A]], [[B]]
; CHECK-NEXT: [[RESULT:%.*]] = zext i1 [[EQ]] to i32
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
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This is a bit iffy, but also not directly related to this PR. It's not clear whether we should expand scmp/ucmp back to icmp+select if we can exclude one of the cases.

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I think for this particular case we can improve the way ucmp/scmp is handled in ConstraintElimination. The branch implies that within the unreached block a >= b, so we can replace the call with icmp + zext/sext. I don't think it's worth adding extra checks in InstCombine for this.

; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -62,10 +61,7 @@ define void @test_low_sge(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i64 [[A]], [[B]]
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[EQ]], i32 0, i32 [[DOT]]
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -114,8 +110,7 @@ define void @test_low_ne(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp ne i64 [[A]], [[B]]
; CHECK-NEXT: [[RESULT:%.*]] = zext i1 [[EQ]] to i32
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -212,8 +207,7 @@ define void @test_mid_sge(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp ne i64 [[A]], [[B]]
; CHECK-NEXT: [[RESULT:%.*]] = zext i1 [[EQ]] to i32
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand All @@ -238,10 +232,7 @@ define void @test_mid_sle(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i64 [[A]], [[B]]
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[EQ]], i32 0, i32 [[DOT]]
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand All @@ -266,9 +257,8 @@ define void @test_mid_ne(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: call void @use(i32 [[DOT]])
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
%eq = icmp eq i64 %a, %b
Expand Down Expand Up @@ -338,10 +328,7 @@ define void @test_high_slt(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i64 [[A]], [[B]]
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[EQ]], i32 0, i32 [[DOT]]
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand Down Expand Up @@ -389,10 +376,7 @@ define void @test_high_sle(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i64 [[A]], [[B]]
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[EQ]], i32 0, i32 [[DOT]]
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand All @@ -417,10 +401,7 @@ define void @test_high_ne(i64 %a, i64 %b) {
; CHECK: normal:
; CHECK-NEXT: ret void
; CHECK: unreached:
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i64 [[A]], [[B]]
; CHECK-NEXT: [[SLT:%.*]] = icmp slt i64 [[A]], [[B]]
; CHECK-NEXT: [[DOT:%.*]] = select i1 [[SLT]], i32 -1, i32 1
; CHECK-NEXT: [[RESULT:%.*]] = select i1 [[EQ]], i32 0, i32 [[DOT]]
; CHECK-NEXT: [[RESULT:%.*]] = call i32 @llvm.scmp.i32.i64(i64 [[A]], i64 [[B]])
; CHECK-NEXT: call void @use(i32 [[RESULT]])
; CHECK-NEXT: ret void
;
Expand Down
130 changes: 130 additions & 0 deletions llvm/test/Transforms/InstCombine/scmp.ll
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Expand Up @@ -343,3 +343,133 @@ define i8 @scmp_from_select_gt_and_lt(i32 %x, i32 %y) {
%r = select i1 %gt, i8 1, i8 %lt
ret i8 %r
}

; (x == y) ? 0 : (x s> y ? 1 : -1) into scmp(x, y)
define i8 @scmp_from_select_eq_and_gt(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 1, i8 -1
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}

define i8 @scmp_from_select_eq_and_gt_inverse(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_inverse(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: ret i8 [[R]]
;
%ne = icmp ne i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 1, i8 -1
%r = select i1 %ne, i8 %sel1, i8 0
ret i8 %r
}

define <4 x i8> @scmp_from_select_eq_and_gt_vec(<4 x i32> %x, <4 x i32> %y) {
; CHECK-LABEL: define <4 x i8> @scmp_from_select_eq_and_gt_vec(
; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call <4 x i8> @llvm.scmp.v4i8.v4i32(<4 x i32> [[X]], <4 x i32> [[Y]])
; CHECK-NEXT: ret <4 x i8> [[R]]
;
%eq = icmp eq <4 x i32> %x, %y
%gt = icmp sgt <4 x i32> %x, %y
%sel1 = select <4 x i1> %gt, <4 x i8> splat(i8 1), <4 x i8> splat(i8 -1)
%r = select <4 x i1> %eq, <4 x i8> splat(i8 0), <4 x i8> %sel1
ret <4 x i8> %r
}

define i8 @scmp_from_select_eq_and_gt_commuted1(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_commuted1(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[Y]], i32 [[X]])
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp slt i32 %x, %y
%sel1 = select i1 %gt, i8 1, i8 -1
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}

define i8 @scmp_from_select_eq_and_gt_commuted2(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_commuted2(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[Y]], i32 [[X]])
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 -1, i8 1
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}

define i8 @scmp_from_select_eq_and_gt_commuted3(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_commuted3(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[R:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp slt i32 %x, %y
%sel1 = select i1 %gt, i8 -1, i8 1
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}

; Negative test: true value of outer select is not zero
define i8 @scmp_from_select_eq_and_gt_neg1(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_neg1(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i32 [[X]], [[Y]]
; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 1, i8 -1
; CHECK-NEXT: [[R:%.*]] = select i1 [[EQ]], i8 5, i8 [[SEL1]]
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 1, i8 -1
%r = select i1 %eq, i8 5, i8 %sel1
ret i8 %r
}

; Negative test: true value of inner select is not 1 or -1
define i8 @scmp_from_select_eq_and_gt_neg2(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_neg2(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i32 [[X]], [[Y]]
; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 2, i8 -1
; CHECK-NEXT: [[R:%.*]] = select i1 [[EQ]], i8 0, i8 [[SEL1]]
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 2, i8 -1
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}

; Negative test: false value of inner select is not 1 or -1
define i8 @scmp_from_select_eq_and_gt_neg3(i32 %x, i32 %y) {
; CHECK-LABEL: define i8 @scmp_from_select_eq_and_gt_neg3(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: [[EQ:%.*]] = icmp eq i32 [[X]], [[Y]]
; CHECK-NEXT: [[GT:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[GT]], i8 1, i8 22
; CHECK-NEXT: [[R:%.*]] = select i1 [[EQ]], i8 0, i8 [[SEL1]]
; CHECK-NEXT: ret i8 [[R]]
;
%eq = icmp eq i32 %x, %y
%gt = icmp sgt i32 %x, %y
%sel1 = select i1 %gt, i8 1, i8 22
%r = select i1 %eq, i8 0, i8 %sel1
ret i8 %r
}
30 changes: 7 additions & 23 deletions llvm/test/Transforms/InstCombine/select-select.ll
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Expand Up @@ -177,10 +177,7 @@ define <2 x i8> @sel_shuf_narrowing_commute2(<4 x i8> %x, <4 x i8> %y, <2 x i8>

define i8 @strong_order_cmp_slt_eq(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_slt_eq(
; CHECK-NEXT: [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.lt = icmp slt i32 %a, %b
Expand All @@ -192,10 +189,7 @@ define i8 @strong_order_cmp_slt_eq(i32 %a, i32 %b) {

define i8 @strong_order_cmp_ult_eq(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_ult_eq(
; CHECK-NEXT: [[CMP_LT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.lt = icmp ult i32 %a, %b
Expand Down Expand Up @@ -252,10 +246,7 @@ define i8 @strong_order_cmp_slt_ult_wrong_pred(i32 %a, i32 %b) {

define i8 @strong_order_cmp_sgt_eq(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_sgt_eq(
; CHECK-NEXT: [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.gt = icmp sgt i32 %a, %b
Expand All @@ -267,10 +258,7 @@ define i8 @strong_order_cmp_sgt_eq(i32 %a, i32 %b) {

define i8 @strong_order_cmp_ugt_eq(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_ugt_eq(
; CHECK-NEXT: [[CMP_GT:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.ucmp.i8.i32(i32 [[A:%.*]], i32 [[B:%.*]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.gt = icmp ugt i32 %a, %b
Expand Down Expand Up @@ -395,9 +383,7 @@ define i8 @strong_order_cmp_slt_eq_slt_not_oneuse(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_slt_eq_slt_not_oneuse(
; CHECK-NEXT: [[CMP_LT:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: call void @use1(i1 [[CMP_LT]])
; CHECK-NEXT: [[SEL_LT:%.*]] = select i1 [[CMP_LT]], i8 -1, i8 1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_LT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.lt = icmp slt i32 %a, %b
Expand All @@ -410,11 +396,9 @@ define i8 @strong_order_cmp_slt_eq_slt_not_oneuse(i32 %a, i32 %b) {

define i8 @strong_order_cmp_sgt_eq_eq_not_oneuse(i32 %a, i32 %b) {
; CHECK-LABEL: @strong_order_cmp_sgt_eq_eq_not_oneuse(
; CHECK-NEXT: [[CMP_GT:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[SEL_GT:%.*]] = select i1 [[CMP_GT]], i8 1, i8 -1
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A]], [[B]]
; CHECK-NEXT: [[CMP_EQ:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: call void @use1(i1 [[CMP_EQ]])
; CHECK-NEXT: [[SEL_EQ:%.*]] = select i1 [[CMP_EQ]], i8 0, i8 [[SEL_GT]]
; CHECK-NEXT: [[SEL_EQ:%.*]] = call i8 @llvm.scmp.i8.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: ret i8 [[SEL_EQ]]
;
%cmp.gt = icmp sgt i32 %a, %b
Expand Down
9 changes: 3 additions & 6 deletions llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
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Expand Up @@ -10,8 +10,7 @@ define void @test_01(i32 %x, i32 %y) {
; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[C2]], label [[EXIT:%.*]], label [[UNREACHED:%.*]]
; CHECK: unreached:
; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[X]], [[Y]]
; CHECK-NEXT: [[COMPARATOR:%.*]] = zext i1 [[C1]] to i32
; CHECK-NEXT: [[COMPARATOR:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: call void @use(i32 [[COMPARATOR]])
; CHECK-NEXT: unreachable
; CHECK: exit:
Expand Down Expand Up @@ -42,8 +41,7 @@ define void @test_02(i32 %x, i32 %y) {
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: br i1 [[C3]], label [[EXIT]], label [[UNREACHED:%.*]]
; CHECK: unreached:
; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[X]], [[Y]]
; CHECK-NEXT: [[COMPARATOR:%.*]] = zext i1 [[C1]] to i32
; CHECK-NEXT: [[COMPARATOR:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: call void @use(i32 [[COMPARATOR]])
; CHECK-NEXT: unreachable
; CHECK: exit:
Expand Down Expand Up @@ -77,8 +75,7 @@ define i32 @test_03(i32 %x, i32 %y) {
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i32 [[X]], [[Y]]
; CHECK-NEXT: br i1 [[C3]], label [[EXIT]], label [[UNREACHED:%.*]]
; CHECK: unreached:
; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[X]], [[Y]]
; CHECK-NEXT: [[COMPARATOR:%.*]] = zext i1 [[C1]] to i32
; CHECK-NEXT: [[COMPARATOR:%.*]] = call i32 @llvm.scmp.i32.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: ret i32 [[COMPARATOR]]
; CHECK: exit:
; CHECK-NEXT: ret i32 0
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